TPS7H3301-SP DDR Termination Evaluation Module


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The TPS7H3301-SP source/sink double data rate (DDR) termination regulator is designed to support system needs for low-noise applications.

It is an ntegrated solution with reduced system solution size, improved efficiency and simple system design integration.

  • Source Sink Linear Regulator supporting current up to 3A
  • Low output noise
  • Small size
  • Support DDR, DDR2, DDR3 and DDR4 applications
  • Integrated solution that:
    • Reduces the system solution size
    • Improves efficiency
    • Simplifies design integration
DDR memory power ICs
TPS7H3301-SP Radiation-hardened QMLV, 2.3-V to 3.5-V input, 3-A sink and source DDR termination LDO regulator
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Evaluation board

TPS7H3301EVM-CVAL — TPS7H3301-SP DDR Termination Evaluation Module

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Technical documentation

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* EVM User's guide TPS7H3301EVM-CVAL User's Guide (Rev. B) 30 Oct 2020

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