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TPS7H3301-SP source/sink Double Data Rate (DDR) termination regulator designed to support system needs for low noise applications.
Integrated solution with reduced system solution size, improved efficiency, and simple system design integration.
- Source Sink Linear Regulator supporting current up to 3A
- Low output noise
- Small size
- Support DDR, DDR2, DDR3 and DDR4 applications
- Integrated solution that:
- Reduces the system solution size
- Improves efficiency
- Simplifies design integration
This is a development kit for the Xilinx® XQRKU060 FPGA with industrial -1 speed grade. ADA-SDEV-KIT2 has a modular board design with a XRTC-compatible configuration module, two FMC connectors, DDR3 DRAM, system monitoring, and space-grade TI power management and temperature-sensing solutions.
Design tools & simulation
SLVMBF1B.ZIP (116 KB) - PSpice Model
SLVC650A.ZIP (97 KB)