Radiation-hardness-assured (RHA) 3-A sink/source DDR termination linear regulator

TPS7H3301-SP

ACTIVE

Product details

DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3 Control mode S3, S4/S5 Iout VTT (Max) (A) 3 Iq (Typ) (mA) 18 Output VREF, VTT Vin (Min) (V) 0.9 Vin (Max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (C) -55 to 125, 25 to 25
DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3 Control mode S3, S4/S5 Iout VTT (Max) (A) 3 Iq (Typ) (mA) 18 Output VREF, VTT Vin (Min) (V) 0.9 Vin (Max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (C) -55 to 125, 25 to 25
CFP (HKR) 16 106 mm² 11 x 9.6
  • 5962R14228(1):
    • Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail(3)
  • Separate low-voltage input (VLDOIN) down to
    0.9 V for improved power efficiency(3)
  • 3-A sink and source termination regulator includes droop compensation
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • ±15-mV accuracy
    • ±10-mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • 5962R14228(1):
    • Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail(3)
  • Separate low-voltage input (VLDOIN) down to
    0.9 V for improved power efficiency(3)
  • 3-A sink and source termination regulator includes droop compensation
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • ±15-mV accuracy
    • ±10-mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

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Technical documentation

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Type Title Date
* Data sheet TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. B) 30 Jun 2020
* Radiation & reliability report TPS7H3301-SP Neutron Displacement Damage Characterization 12 Apr 2019
* Radiation & reliability report TPS7H3301-SP Single-Event Effects Radiation Report (Rev. A) 25 Jan 2017
* SMD TPS7H3301-SP SMD 5962-14228 08 Jul 2016
* Radiation & reliability report TPS7H3301-SP Total Ionizing Dose Radiation Report 01 Jul 2016
Selection guide TI Space Products (Rev. H) 27 Jan 2021
User guide TPS7H3301EVM-CVAL User's Guide (Rev. B) 30 Oct 2020
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 21 Aug 2020
Application note DDR VTT Power Solutions: A Competitive Analysis (Rev. A) 09 Jul 2020
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations 18 May 2020
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form 18 May 2020
Application note Single-Event Effects Confidence Interval Calculations 14 Jan 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing 17 Jun 2019
E-book Radiation Handbook for Electronics (Rev. A) 21 May 2019
Application note TI Space Rated Power Solution for Microsemi® RTG4™ FPGA (Rev. A) 27 Jul 2018
Application note External Soft-Start Circuit for TPS7H3301-SP Power-Up Sequencing Applications 07 Jul 2016
Technical article 7 things to know about spacecraft subsystems before your next trip to Mars 06 Jul 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS7H3301EVM-CVAL — TPS7H3301-SP DDR Termination Evaluation Module

TPS7H3301-SP source/sink Double Data Rate (DDR) termination regulator designed to support system needs for low noise applications.

Integrated solution with reduced system solution size, improved efficiency, and simple system design integration.

In stock
Limit: 3
Development kit

ALPHA-XILINX-KU060-SPACE — Alpha Data® board for Xilinx® Kintex® UltraScale™ XQRKU060 FPGA with TI power

This is a development kit for the Xilinx® XQRKU060 FPGA with industrial -1 speed grade. ADA-SDEV-KIT2 has a modular board design with a XRTC-compatible configuration module, two FMC connectors, DDR3 DRAM, system monitoring, and space-grade TI power management and temperature-sensing solutions.
From: Alpha Data Parallel Systems Ltd.
Simulation model

TPS7H3301-SP PSpice Transient Model (Rev. B)

SLVMBF1B.ZIP (116 KB) - PSpice Model
Simulation model

TPS7H3301-SP Unencrypted PSPICE Transient Model

SLVMDD2.ZIP (196 KB) - PSpice Model
Calculation tool

TPS7H3301-SP Calculator (Rev. A)

SLVC650A.ZIP (97 KB)
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CFP (HKR) 16 View options

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