CDCLVD2106EVM
CDCLVD2106 평가 모듈
CDCLVD2106EVM
개요
The CDCLVD1212/CDCLVD2106 are high-performance, low-additive jitter clock buffers. They have two universal input buffers that support single-ended or differential clock inputs and are selectable through a control pin (for CDCLVD1212 only). The devices also feature on-chip bias generators that can provide the LVDS common-mode voltage to the device inputs. The evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVD1212 or CDCLVD2106. However, this EVM can also be used for customers interested in the CDCLVD1216 or CDCLVD2108 as well. This fully assembled and factory-tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well-controlled 50-ohm impedance microstrip transmission lines.
특징
- Easy-to-use evaluation board to fan out low-phase noise clocks
- Easy device setup
- Fast configuration
- Control pins configurable through jumpers
- Board powered at 2.5 V
- Single-ended or differential input clocks
- Device supports twelve LVDS outputs, EVM supports four LVDS outputs
클록 버퍼
주문 및 개발 시작
CDCLVD2106EVM — CDCLVD2106 Evaluation Module
CDCLVD2106EVM — CDCLVD2106 Evaluation Module
기술 자료
| 유형 | 직함 | 최신 영어 버전 다운로드 | 날짜 | ||
|---|---|---|---|---|---|
| 인증서 | CDCLVD2106EVM EU Declaration of Conformity (DoC) | 2019. 1. 2 | |||
| 사용 설명서 | Low Additive Jitter, Twelve LVDS Outputs Clock Buffer Evaluation Board | 2010. 9. 1 |