CDCLVP1102EVM
CDCLVP1102 평가 모듈
CDCLVP1102EVM
개요
The CDCLVP1102 is a high-performance, low additive phase noise clock buffer. It has a single universal input buffer that supports either single-ended or differential clock inputs, and feeds to two LVPECL outputs. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP1102. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP1102 device functionalities. For optimum performance, the board is equipped with 50-W SMA connectors and well-controlled, 50-W impedance microstrip transmission lines.
특징
- Easy-to-use evaluation board to fan out low phase noise clocks
- Easy device setup
- Fast configuration
- Control pins configurable through jumpers
- Board powered at +2.5-/+3.3-V
- Single-ended or differential input clocks
- CDCLVP1102 supports two LVPECL outputs; CDCLVP1102EVM supports one LVPECL output
클록 버퍼
주문 및 개발 시작
평가 보드
CDCLVP1102EVM — CDCLVP1102 Evaluation Module
CDCLVP1102EVM — CDCLVP1102 Evaluation Module
기술 자료
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TI에서 선정한 인기 문서
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2개 모두 보기
| 유형 | 직함 | 최신 영어 버전 다운로드 | 날짜 | ||
|---|---|---|---|---|---|
| * | EVM User's guide | CDCLVP1102EVM User's Guide | 2009. 7. 9 | ||
| 인증서 | CDCLVP1102EVM EU Declaration of Conformity (DoC) | 2019. 1. 2 |