SN65LVDS20EVM
SN65LVDS20 평가 모듈
SN65LVDS20EVM
개요
This Evaluation Module (EVM) facilitates the experimental testing of the Texas Instruments SN65LVDS20 Repeater/Translator silicon device.This device accepts low-voltage PECL input levels and Translates them to LVDS output levels as defined by TIA/EIA-644-A standard.
The device operates at rates to 4Gbps or clock rates to 2 GHz at either 3.3 V or 2.5 V supply operation, with less than 45 ps of total jitter.The device output can be disabled to the high impedance state by applying a logic High level to the EN bar pin.
This device also provides a voltage reference output (Vbb) of typically 1.35 V below Vcc for use in receiving single-ended PECL input signals.
LVDS, M-LVDS 및 PECL IC
주문 및 개발 시작
평가 보드
SN65LVDS20EVM — SN65LVDS20 Evaluation Module
SN65LVDS20EVM — SN65LVDS20 Evaluation Module
기술 자료
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TI에서 선정한 인기 문서
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2개 모두 보기
| 유형 | 직함 | 최신 영어 버전 다운로드 | 날짜 | ||
|---|---|---|---|---|---|
| * | EVM User's guide | Translator/Oscillator Buffer EVM (Rev. A) | 2004. 9. 17 | ||
| 인증서 | SN65LVDS20EVM EU Declaration of Conformity (DoC) | 2019. 1. 2 |