TIDEP0018
Sitara 프로세서용 병렬 카메라 인터페이스
TIDEP0018
개요
This camera interface design connects to a 10-bit parallel interface to the AM335x general purpose memory controller (GPMC) 16-bit multiplexed address/data bus. This design consumes roughly 150mW less power than typical USB solutions, and is ideal for applications like portable data terminals, ruggedized handhelds, portable consumer, industrial handhelds and others. The reference design is based on the QuickLogic 3.1 MP Camera Sensor (using an Aptina 3.1 MP sensor) connected to a camera expansion board. Together, they connect to the BeagleBone platform. The BeagleBone and the QuickLogic 3.1 MP camera add-on board are available for purchase.
More information on QuickLogic: http://www.quicklogic.com
More information about BeagleBone: https://www.ti.com/tool/beaglebn
More information about the QuickLogic 3.1 MP camera add-on board for the BeagleBone, including design files and software: http://www.quicklogic.com/solutions/reference-designs/ti-sitara-beaglebone-camera-cape/
특징
- Supports up to 5MP camera at 10fps with DMA
- Up to 30 frames per second (fps) at VGA (640 x 480) resolution
- Reduces system power consumption up to 150mW
- No software effort required for OEM
- 6x6mm, non-HDI rules package
- This is an example sub-system design that includes schematics, BOM, Gerbers and other design files.
완조립 보드는 테스팅과 성능 검증을 위해서만 개발되었으며 판매를 위한 것이 아닙니다.
설계 파일 및 제품
설계 파일
바로 사용 가능한 시스템 파일을 다운로드하여 설계 프로세스에 속도를 높여 보십시오.
설계 구성요소, 참조 지정자 및 제조업체/부품 번호의 전체 목록
제품
TI 제품을 설계 및 잠재적 대안에 포함합니다.
기술 자료
| 유형 | 직함 | 최신 영어 버전 다운로드 | 날짜 | ||
|---|---|---|---|---|---|
| * | 설계 가이드 | Parallel Camera Interface for Sitara Processors Design Guide | 2014. 7. 29 | ||
| Third party document | Low Power Camera Interface to BeagleBone Reference Design [QuickLogic Information Page] | 2014. 7. 30 | |||
| Third party document | BeagleBone 3.1MP Camera Cape System Reference Manual | 2014. 7. 30 |