CDCLVC1112EVM
CDCLVC1112 評估模組
CDCLVC1112EVM
概覽
The CDCLVC1112 is a high-performance, low additive phase noise LVCMOS clock buffer. It has one LVCMOS input and twelve LVCMOS outputs. It has also an enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVC1112. However, this EVM can also be used for customers interested in evaluating the performance of the CDCLVC1106, CDCLVC1108 or CDCLVC1110 as well. For optimum performance, the board is equipped with 50-ohm SMA connectors and well controlled 50-ohm impedance microstrip transmission lines.
特點
- Easy-to-use evaluation board to fan out low phase noise LVCMOS clock signals
- Easy device setup
- Enable pin configurable though jumper and SMA
- Board powered at 3.3V
時鐘緩衝器
技術文件
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| 證書 | CDCLVC1112EVM EU Declaration of Conformity (DoC) | 2019/1/2 | ||||
| 使用指南 | Low Additive Phase Noise LVCMOS Clock Buffer Eval Board | 2010/7/7 |