This verified design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest power solution for a full scale input sine wave of 10 KHz. At a total power consumption of less than 35mW, this design has been optimized to achieve an effective resolution greater than 16 bits. The input driver for the ADC uses the OPA320 for low power, low noise and linear rail-to-rail input and output operation. The reference buffer drive utilizes a composite buffer made out of THS4281 & OPA333 to get the desired performance at lowest power consumption.
已開發完全組裝的電路板，僅供測試與性能驗證，且為非賣品。
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| 使用指南 | 18-Bit, 1-MSPS Data Acquisition (DAQ) Block Optimized for Lowest Power (Rev. C) | 2017/2/17 |