Reduce design effort with integrated functional safety features of Jacinto 7 processors and PMICs
00:54:28
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28 SEP 2020
This session will overview Jacinto 7 platform functional safety including:
- Jacinto 7 safety architecture including main and MCU domain
- Hardware systematic and diagnostics capabilities
- Safety collateral including safety manual and FMEDA
- Safety software architecture and safety software SDK support
- Reference safety use-case examples