UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The 20-bit DAC11001A, 18-bit DAC91001, and 16-bit DAC81001 (DACx1001) are single-channel DACs. The unbuffered DAC output architecture is based on an R2R ladder that is designed to provide monotonicity over wide reference and temperature ranges (1-LSB DNL). This architecture provides a very low-noise (7 nV/√Hz) and fast-settling (1 µs) output. The DACx1001 also implement a deglitch circuit that enables low, code-independent glitch at the DAC output. This is extremely useful for creating ultra low harmonic distortion waveform generation.
The DACx1001 requires external reference voltages on REFPF and REFNF pins. The output of the DAC ranges from VREFNF to VREFPF. See the Recommended Operating Conditions for VREFPF and VREFNF voltage ranges.
The DACx1001 also includes precision matched gain setting pins (ROFS, RCM, and RFB), Using these pins and an external op amp, the DAC output can be scaled. The DACx1001 incorporate a power-on-reset circuit that makes sure that the DAC output powers up at zero scale, and remains at zero scale until a valid DAC command is issued. The DACx1001 use a 4-wire serial interface that operates at clock rates of up to 50 MHz.