DLPS176A April   2019  – September 2019 DLP3034-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      DLP DLP3034-Q1 Block System Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  System Mounting Interface Loads
    10. 6.10 Physical Characteristics of the Micromirror Array
    11. 6.11 Micromirror Array Optical Characteristics
    12. 6.12 Window Characteristics
    13. 6.13 Chipset Component Usage Specification
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Micromirror Array
      2. 7.3.2 Double Data Rate (DDR) Interface
      3. 7.3.3 Micromirror Switching Control
      4. 7.3.4 DMD Voltage Supplies
      5. 7.3.5 Logic Reset
      6. 7.3.6 Temperature Sensing Diode
        1. 7.3.6.1 Temperature Sense Diode Theory
      7. 7.3.7 DMD JTAG Interface
    4. 7.4 System Optical Considerations
      1. 7.4.1 Numerical Aperture and Stray Light Control
      2. 7.4.2 Pupil Match
      3. 7.4.3 Illumination Overfill and Alignment
    5. 7.5 Micromirror Array Temperature Calculation
    6. 7.6 Micromirror Landed-On/Landed-Off Duty Cycle
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Application Mission Profile Consideration
    4. 8.4 Illumination Mission Profile Considerations
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Sequencing Requirements
      1. 9.1.1 Power Up and Power Down
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Temperature Diode Pins
    3. 10.3 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
      2. 11.1.2 Device Markings
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Device Handling
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2 Typical Application

The DLP3034-Q1 DMD combined with the DLPC120-Q1 are the primary devices that make up the reference design for a transparent window display system as shown in the block diagram Figure 18.

DLP3034-Q1 fbd-01-dlps176.gifFigure 18. DLP3034-Q1 Reference Design Block Diagram

The DLPC120-Q1 accepts input video over the parallel RGB data interface up to 8 bits per color from a Video Graphics processor. The DLPC120-Q1 then processes the video data (864 × 480 manhattan orientation) by scaling the image to match the DMD resolution (608 × 684 diamond pixel), applies de-gamma correction, bezel adjustment, and then formats the data into DMD bit plane information and stores the data into the DDR2 DRAM. The DMD bit planes are read from DDR2 DRAM, and are then displayed on the DMD using Pulse Width Modulation (PWM) timing. The DLPC120-Q1 synchronizes the DMD bit plane data with the color enable timing for the LED color controller and Driver circuit. Finally, the DMD accepts the bit plane formatted data from the DLPC120-Q1 and displays the data according to the timing controlled by the DLPC120-Q1.

Due to the mechanical nature of the micromirrors, the latency of the DLP3034-Q1 and DLPC120-Q1 chipset is fixed across all temperature and operating conditions. The observed video latency is one frame, or 16.67 ms at an input frame rate of 60 Hz. However, please note that the use of the DLPC120-Q1 bezel adjustment feature, if enabled by the host controller, requires an additional frame of processing.

The DLPC120-Q1 is configured at power up by data stored in the flash file which stores configuration data, DMD and sequence timing information, LED drive information, and other information related to the system functions. See the DLPC120-Q1 Programmer's Guide for information about the this flash configuration data.

The transparent emissive display reference design from TI includes the TMS320F28023 Microcontroller (Piccolo), which is used to adjust the LED current levels in order to control the brightness levels and also the color point for systems with multiple color channels.