SLASE82B June   2015  – March 2024 HD3SS3411-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable and Power Savings
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 AC Coupling Capacitors
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Critical Routes
        2. 7.4.1.2 General Routing/Placement Rules
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The HD3SS3411-Q1 is a high-speed bi-directional passive switch in multiplexer or demultiplexer configurations. Based on control pin SEL, the device provides switching of differential channels between Port B to Port A or Port C to Port A.

The HD3SS3411-Q1 is a generic analog differential passive switch that can work for any high speed interface application as long as it is biased at a common-mode voltage range of 0V to 2V and has differential signaling with differential amplitude up to 1800mVpp. The device offers adaptive tracking that allows users to keep the channel unchanged for the entire common-mode voltage range.

Excellent dynamic characteristics of the device allow high speed switching with minimum attenuation to the signal eye diagram with little added jitter. The HD3SS3411-Q1 consumes < 2mW of power when operational and has a shutdown mode exercisable by OEn pin resulting < 2µW.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
HD3SS3411-Q1 RWA (WQFN, 14) 3.5mm × 3.5mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-9D0AE35D-CF3E-4FED-A041-5930F612698D-low.svg Simplified Schematic