SBOS893C August   2018  – July 2019 INA821

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      INA821 Simplified Internal Schematic
      2.      Typical Distribution of Input Stage Offset Voltage Drift
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics: Table of Graphs
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Setting the Gain
        1. 8.3.1.1 Gain Drift
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Input Common-Mode Range
      4. 8.3.4 Input Protection
      5. 8.3.5 Operating Voltage
      6. 8.3.6 Error Sources
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reference Pin
      2. 9.1.2 Input Bias Current Return Path
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Other Application Examples
      1. 9.3.1 Resistance Temperature Detector Interface
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

There are two modes of operation for the circuit shown in Figure 69: current input and voltage input. This design requires R1 >> R2 >> R3. Given this relationship, Equation 3 calculates the current input mode transfer function.

Equation 3. INA821 q_curr_mode_xfer_function_bos562.gif

where

  • G represents the gain of the instrumentation amplifier.
  • VD represents the differential voltage at the INA821 inputs.
  • VREF is the voltage at the INA821 REF pin.
  • IIN is the input current.

Equation 4 shows the transfer function for the voltage input mode.

Equation 4. INA821 q_voltage_input_mode_xfer_function_bos562.gif

where

  • VIN is the input voltage

R1 sets the input impedance of the voltage input mode. The minimum typical input impedance is 100 kΩ. The R1 value is 100 kΩ because increasing the R1 value also increases noise. The value of R3 must be extremely small compared to R1 and R2. The value of R3 is 20 Ω because that resistance value is smaller than R1 and yields an input voltage of ±400 mV when operating in current mode (±20 mA).

Use Equation 5 to calculate R2 if VD = ±400 mV, VIN = ±10 V, and R1 = 100 kΩ.

Equation 5. INA821 q_r2_vd_vin_r1_bos562.gif

The value obtained from Equation 5 is not a standard 0.1% value, so 4.17 kΩ is selected. R1 and R2 use 0.1% tolerance resistors to minimize error.

Use Equation 6 to calculate the gain of the instrumentation amplifier.

Equation 6. INA821 q_ideal_gain_bos562.gif

Equation 7 calculates the gain-setting resistor value using the INA821 gain equation (Equation 1).

Equation 7. INA821 ai_EQ002_INA821.gif

Use a standard 0.1% resistor value of 10.5 kΩ for this design.