SNVS325E January   2005  – January 2016 LM2852

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1. 3.1 Efficiency vs ILOAD
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 LM2852Y Typical Characteristics (500 kHz)
    7. 6.7 LM2852X Typical Characteristics (1500 kHz)
    8. 6.8 LM2852 Typical Characteristics (Both Y and X Versions)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Split-Rail Operation
      2. 7.3.2 Switch Node Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor (CIN)
        2. 8.2.2.2 Soft-Start Capacitor (CSS)
        3. 8.2.2.3 Soft-Start Capacitor (CSS) and Fault Conditions
        4. 8.2.2.4 Compensation
        5. 8.2.2.5 Output Filter Values
        6. 8.2.2.6 Choosing an Inductance Value
        7. 8.2.2.7 Output Filter Inductors
        8. 8.2.2.8 Output Filter Capacitors
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

These are several guidelines to follow while designing the PCB layout for an LM2852 application.

  • The input bulk capacitor, CIN, must be placed very close to the PVIN pin to keep the resistance as low as possible between the capacitor and the pin. High-current levels are present in this connection
  • All ground connections must be tied together. Use a broad ground plane, for example a completely filled back plane, to establish the lowest resistance possible between all ground connections
  • The sense pin connection must be made as close to the load as possible so that the voltage at the load is the expected regulated value. The sense line must not run too close to nodes with high EMI (such as the switch node) to minimize interference
  • The switch node connections must be low resistance to reduce power losses. Low resistance means the trace between the switch pin and the inductor must be wide. However, the area of the switch node must not be too large since EMI increases with greater area. So connect the inductor to the switch pin with a short, but wide trace. Other high current connections in the application such as PVIN and VOUT assume the same trade off between low resistance and EMI
  • Allow area under the chip to solder the entire exposed die attach pad to ground for improved thermal and electrical performance

10.2 Layout Example

LM2852 LM2852_layout_example.png Figure 15. PCB Layout Example