SNVS099I May   1999  – October 2016 LM2991

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 ON/Off Pin
      2. 7.3.2 Forcing The Output Positive
      3. 7.3.3 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with VOUT(TARGET) -5 V ≥ VIN > -26 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Input Capacitor
          2. 8.2.2.1.2 Output Capacitor
        2. 8.2.2.2 Ceramic Bypass Capacitors
        3. 8.2.2.3 Minimum Load
        4. 8.2.2.4 Setting The Output Voltage
        5. 8.2.2.5 Power Dissipation
        6. 8.2.2.6 Estimating Junction Temperature
      3. 8.2.3 Application Curves
      4. 8.2.4 Additional Application Circuits
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

The dynamic performance of the LM2991 is dependent on the layout of the PCB. PCB layout practices that are adequate for typical LDOs may degrade the PSRR, noise, or transient performance of the device. Best performance is achieved by placing CIN and COUT on the same side of the PCB as the LM2991, and as close as is practical to the package. The ground connections for CIN and COUT must be back to the LM2991 GND pin using as wide and short of a copper trace as is practical.

Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops. The input and output capacitors must be directly connected to the IN, OUT, and GND pins of the LM2991 using traces which do not have other currents flowing in them (Kelvin connect). The best way to do this is to lay out CIN and COUT near the device with short traces to the IN, OUT, and GND pins. The regulator ground pin must be connected to the external circuit ground so that the regulator and its capacitors have a single-point ground.

Stability problems have been seen in applications where vias to an internal ground plane were used at the ground points of the LM2991 device and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground technique for the regulator and its capacitors fixed the problem.

Because high current flows through the traces going into the IN pin and coming from the OUT pin, Kelvin connect the capacitor leads to these pins so there is no voltage drop in series with the input and output capacitors.

10.2 Layout Example

LM2991 layout_snvs099.gif Figure 20. LM2991 TO-263 Board Layout