SNVS808C May   2012  – Februrary 2016 LM5134

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input-to-Output Logic
        2. 8.2.2.2 Input Threshold Type
        3. 8.2.2.3 VDD Bias Supply Voltage
        4. 8.2.2.4 Peak Source and Sink Currents
        5. 8.2.2.5 Enable and Disable Function
        6. 8.2.2.6 Propagation Delay
        7. 8.2.2.7 PILOT MOSFET Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Detailed Description

7.1 Overview

The LM5134 is a single low-side gate driver with one main output, OUT, and a complementary output PILOT. The OUT pin has high 7.6-A and 4.5-A peak sink and source current and can be used to drive large power MOSFETs or multiple MOSFETs in parallel. The PILOT pin has 820-mA and 660-mA peak sink and source current, and is intended to drive an external turnoff MOSFET, as shown in Functional Block Diagram. The external turnoff FET can be placed close to the power MOSFETs to minimize the loop inductance, and therefore helps eliminate stray inductance induced oscillations or undesired turnon. This feature also provides the flexibility to adjust turnon and turnoff speed independently.

7.2 Functional Block Diagram

LM5134 30192803.gif

7.3 Feature Description

When using the external turnoff switch, it is important to prevent the potential shoot-through between the external turnoff switch and the LM5134 internal pullup switch. The propagation delay, TPD-ON and TPD-OFF, has been implemented in the LM5134 between the PILOT and the OUT pins, as depicted in the timing diagram. The turnon delay TPD-ON is designed to be shorter than the turnoff delay TPD-OFF because the rising time of the external turnoff switch can attribute to the additional delay time. It is also desirable to minimize TPD-ON to favor the fast turnoff of the power MOSFET.

The LM5134 offers both inverting and noninverting inputs to satisfy requirements for inverting and non-inverting gate drive signals in a single device type. Inputs of the LM5134 are TTL and CMOS Logic compatible and can withstand input voltages up to 14 V regardless of the VDD voltage. This allows inputs of the LM5134 to be connected directly to most PWM controllers.

The LM5134 includes an Undervoltage Lockout (UVLO) circuit. When the VDD voltage is below the UVLO threshold voltage, the IN and INB inputs are ignored, and if there is sufficient VDD voltage, the OUT is pulled low. In addition, the LM5134 has an internal PNP transistor in parallel with the output NMOS. Under the UVLO condition, the PNP transistor will be on and clamp the OUT voltage below 1 V. This feature ensures the OUT remains low even with insufficient VDD voltage.

7.4 Device Functional Modes

Table 1 lists the logic options for the device and Table 2 lists the device truth table.

Table 1. Input/Output Options

BASE PART NUMBER LOGIC INPUT
LM5134A CMOS
LM5134B TTL

Table 2. Truth Table

IN INB OUT PILOT
L L L H
L H L H
H L H L
H H L H