SBOS940A May   2019  – March 2020 OPA818

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     High-Speed Optical Front-End
  3. 3 Description
    1.     Photodiode Capacitance vs 3-dB Bandwidth
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
    7. 7.7 Typical Characteristics: VS = 6 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 8.3.4 Low Input Capacitance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 8.4.2 Single-Supply Operation (6 V to 13 V)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, Non-Inverting Operation
      2. 9.1.2 Wideband, Transimpedance Design Using OPA818
    2. 9.2 Typical Applications
      1. 9.2.1 High Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Non-Inverting Gain of 2 V/V
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.1.1 Thermal Considerations

The OPA818 will not require heatsinking or airflow in most applications. Maximum allowed junction temperature will set the maximum allowed internal power dissipation as described below. In no case should the maximum junction temperature be allowed to exceed 105°C.

Operating junction temperature (TJ) is given by TA + PD × RθJA. The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. PDL will depend on the required output signal and load but would, for a grounded resistive load, be at a maximum when the output is fixed at a voltage equal to 1/2 of either supply voltage (for balanced bipolar supplies). Under this condition PDL = VS2/(4 × RL) where RL includes feedback network loading.

Note that it is the power in the output stage and not into the load that determines internal power dissipation.

As a worst-case example, compute the maximum TJ using OPA818 in the circuit of Figure 49 operating at the maximum specified ambient temperature of +85°C and driving a grounded 100-Ω load.

PD = 10 V × 27.7 mA + 52 /(4 × (100 Ω || 350.9 Ω)) ≈ 357 mW

Maximum TJ = 85°C + (0.357 W × 54.6°C/W) = 104.5°C.

All actual applications will be operating at lower internal power and junction temperature.