SCAS542H October   1995  – February 2024 SN74AC573

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Timing Requirements, VCC = 3.3 V ± 0.3 V
    6. 5.6 Timing Requirements, VCC = 5 V ± 0.5 V
    7. 5.7 Switching Characteristics, VCC = 3 V ± 0.3 V
    8. 5.8 Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 5.9 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Power Supply Recommendations
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
      2. 8.2.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • RKS|20
  • NS|20
  • N|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74AC573 RKS (VQFN, 20) 4.5 mm × 2.5 mm 4.5mm × 2.5mm
DB (SSOP, 20) 7.2 mm × 7.8 mm 7.2mm x 5.30mm
DGV (TVSOP, 20) 5 mm × 6.4 mm 5mm × 4.4mm
DW (SOIC, 20) 12.8 mm × 10.3 mm 12.80mm x 7.50mm
NS (SOP, 20) 12.6 mm × 7.8 mm 12.6mm x 5.3mm
N (PDIP, 20) 24.33 mm × 9.4 mm 24.33mm x 6.35mm
PW (TSSOP, 20) 6.5 mm × 6.4 mm 6.50mm x 4.40mm
(1) For more information, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
GUID-C7F8C849-1ECF-4C8A-B4D9-8230FF0292A9-low.png Logic Diagram (Positive Logic)