SCLS427J April   1999  – February 2024 SN74LV4066A

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information: SN74LV4066A
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics (LV)
    6. 5.6 Timing Characteristics VCC = 2.5V ± 0.2V
    7. 5.7 Timing Characteristics VCC = 3.3V ± 0.3V
    8. 5.8 Timing Characteristics VCC = 5V ± 0.5V
    9. 5.9 AC Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • RGY|14
  • DB|14
  • DGV|14
  • PW|14
  • N|14
  • NS|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information: SN74LV4066A

THERMAL METRIC(1) SN74LV4066A  UNIT
D (SOIC) PW (TSSOP) RGY (VQFN)
14 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance  128.8 150.6 91.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 81.8 78.2 91.8 °C/W
RθJB Junction-to-board thermal resistance 84.2 93.7 66.5 °C/W
ΨJT Junction-to-top characterization parameter 39.5 24.6 20.0 °C/W
ΨJB Junction-to-board characterization parameter 83.7 93.1 66.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 50.0 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.