SLASF51 February   2024 TMUXHS4446

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 High-Speed Performance Parameters
    7. 5.7 Switching Characteristics
    8. 5.8 I2C Timing Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High-Speed Differential Signal Switching
      2. 6.3.2 Low-Speed SBU Signal Switching
      3. 6.3.3 GPIO and I2C Control Modes
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application: USB-C with DP Alternate Mode - Source
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
VCC Supply voltage  3.0 3.3 3.6 V
VCC-RAMP Supply voltage ramp time 0.1 100 ms
(1)DRHS Data rate, high speed datapaths (Cx to DPx/SSx)  Differential AC coupled interfaces 10 Gbps
(1)DRSBU Data rate, SBU/AUX paths Differential or single ended signals 1 Gbps
VIH-GPIO Input high voltage on GPIO pins A[1:0], MODE[1:0], CONF[2:0] pins 0.75 * VCC V
VIL-GPIO Input low voltage on GPIO pins A[1:0], MODE[1:0], CONF[2:0] pins 0.4 V
VIH-I2C Input high voltage on I2C pins SDA, SCL pins; 3.3V I2C mode 0.75 * VCC V
SDA, SCL pins; 1.8V I2C mode 1.3 V
VIL-I2C Input low voltage on I2C pins SDA, SCL pins; 3.3V I2C mode 0.25 * VCC V
SDA, SCL pins; 1.8V I2C mode 0.5 V
VIO-LS I/O voltage on low speed pins SBUx and AUX[+/-] pins –0.45 VCC V
IHS-SW Current through high speed switch Cx[p or n] to DPx/SSx[p or n] 12 mA
VDIFF-HS High-speed signal pins differential voltage 0 1.8 Vpp
VCM High speed signal pins common mode voltage 0 1.8 V
TA Operating free-air/ambient temperature –40 105 °C
(1) Actual data rates can be more or less depending on link budget, margin and performance of other link elements