SCPS293 November   2023 TPLD1201

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device and Documentation Support
    1. 4.1 Receiving Notification of Documentation Updates
    2. 4.2 Support Resources
    3. 4.3 Trademarks
    4. 4.4 Electrostatic Discharge Caution
    5. 4.5 Glossary
  6. 5Revision History
  7. 6Mechanical, Packaging, and Orderable Information
    1. 6.1 Tape and Reel Information
    2. 6.2 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RWB|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPLD1201 is part of the TI programmable logic device (TPLD) family of devices that feature versatile programmable logic ICs with combinational logic, sequential logic and mixed-signal functions. TPLD provides a fully integrated, low power solution to implement common system functions, such as timing delays, voltage monitors, system resets, power sequencers, I/O expanders, and more. This device features configurable I/O structures that extends compatibility within mixed-signal environments, reducing the number of discrete components required.

System designers can create circuits and configure the macro-cells, I/O pins, and interconnections by temporarily emulating the non-volatile memory or by permanently programming the one-time programmable (OTP) through InterConnect Studio. The TPLD1201 is supported by hardware and software ecosystem with application notes, reference designs and design examples. Visit ti.com for more information and access to design tools.

Package information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TPLD1201RWB (X2QFN, 12)1.6 mm × 1.6 mm
(1) For more information, see Section 6.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20230606-SS0I-G0DK-55PC-SBFFR90TQBVG-low.svg Functional Diagram