SLVSD38C November   2015  – August 2021 TPS61089

PRODMIX  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Enable and Disable
      3. 8.3.3 Soft Start
      4. 8.3.4 Adjustable Switching Frequency
      5. 8.3.5 Adjustable Peak Current Limit
      6. 8.3.6 Overvoltage Protection
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation
        1. 8.4.1.1 Forced PWM Mode
        2. 8.4.1.2 PFM Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Setting Switching Frequency
        3. 9.2.2.3 Setting Peak Current Limit
        4. 9.2.2.4 Setting Output Voltage
        5. 9.2.2.5 Inductor Selection
        6. 9.2.2.6 Input Capacitor Selection
        7. 9.2.2.7 Output Capacitor Selection
        8. 9.2.2.8 Loop Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-1D49BDDB-C9F7-42B0-953B-3443D55A7607-low.gifFigure 6-1 11-Pin VQFN With Thermal Pad RNR Package (Top View)
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NUMBER
FSW 1 I The switching frequency is programmed by a resister between this pin and the SW pin.
VCC 2 O Output of the internal regulator. A ceramic capacitor of more than 1.0 µF is required between this pin and ground.
FB 3 I Output voltage feedback
COMP 4 O Output of the internal error amplifier. The loop compensation network should be connected between this pin and the GND pin.
GND 5 PWR Ground
VOUT 6 PWR Boost converter output
EN 7 I Enable logic input. Logic high level enables the device. Logic low level disables the device and turns it into shutdown mode.
ILIM 8 O Adjustable switching peak current limit. An external resister should be connected between this pin and the GND pin.
VIN 9 I IC power supply input
BOOT 10 O Power supply for high-side MOSFET gate driver. A capacitor must be connected between this pin and the SW pin
SW 11 PWR The switching node pin of the converter. It is connected to the drain of the internal low-side power MOSFET and the source of the internal high-side power MOSFET.