SLVSAX7E August   2011  – August 2016 TPS65270

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjustable Switching Frequency
      2. 8.3.2  Out-of-Phase Operation
      3. 8.3.3  Delayed Start-Up
      4. 8.3.4  Soft-Start Time
      5. 8.3.5  Adjusting the Output Voltage
      6. 8.3.6  Error Amplifier
      7. 8.3.7  Slope Compensation
      8. 8.3.8  Overcurrent Protection
      9. 8.3.9  Thermal Shutdown
      10. 8.3.10 Low Power Mode Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With Minimum VIN (VIN < 4.45 V)
      2. 8.4.2 Operation With EN Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Bootstrap Capacitor Selection
        5. 9.2.2.5 Loop Compensation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage at VIN1, VIN2, LX1, LX2 –0.3 20 V
Voltage at LX1, LX2 (maximum withstand voltage transient < 10 ns) –1 23 V
Voltage at BST1, BST2, referenced to LX1, LX2 pin –0.3 7 V
Voltage at VCC, EN1, EN2, COMP1, COMP2, LOW_P –0.3 7 V
Voltage at SS1, SS2, FB1, FB2, ROSC –0.3 3.6 V
Voltage at AGND, GND –0.3 0.3 V
Operating virtual junction temperature, TJ –40 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Input operating voltage 4.5 18 V
TJ Junction temperature –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1)(2) TPS65270 UNIT
PWP (HTSSOP) RGE (VQFN)
24 PINS 24 PINS
RθJA Junction-to-ambient thermal resistance 41.3 33.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 23.9 36.2 °C/W
RθJB Junction-to-board thermal resistance 22.6 12.1 °C/W
ψJT Junction-to-top characterization parameter 0.8 0.4 °C/W
ψJB Junction-to-board characterization parameter 22.4 12.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 4 2.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

TA = –40°C to 125°C, VIN = 12 V, fSW = 625 kHz (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY
VIN Input Voltage VIN1 and VIN2 4.5 18 V
IDDSDN Shutdown EN1 = EN2 = 0 V 10 µA
IDDQ_nsw Nonswitching quiescent power supply current VFB1 = VFB2 = 900 mV, LOW_P = high 1 mA
UVLO VIN undervoltage lockout Rising VIN 4 4.2 4.45 V
Falling VIN 3.65 3.85 4.1
Hysteresis 0.35
VCC Internal biasing supply VCC load current = 0 A, VIN = 12 V 6.25 V
VCC_drop VCCLDO Dropout Voltage VIN = 5 V, VCC load current = 20 mA 180 mV
IVCC VCC current limit 4.5 V < VIN < 18 V 200 mA
FEEDBACK AND ERROR AMPLIFIER
VFB Regulated feedback voltage VIN = 12 V , VCOMP = 1.2 V, TJ = 25°C –1% 0.8 1% V
VIN = 12 V, VCOMP = 1.2 V, TJ = –40°C to 125°C –2% 0.8 2%
VLINEREG Line regulation: DC VIN = 4.5 V to 18 V, IOUT = 1 A 0.5 %/V
VLOADREG Load regulation: DC IOUT = 10% to 90%, IOUT,MAX 0.4 %/A
Gm_EA Error amplifier transconductance –2 µA < ICOMP < 2 µA 130 µs
Gm_SRC COMP voltage to inductor current Gm ILX = 0.5 A 10 A/V
ENABLE, PFM MODE AND SOFT START
VEN EN1 and EN2 pin threshold Rising 1.55 V
Falling 0.4
VPSM PSM low power mode threshold Rising 1.55 V
Falling 0.4
ISS SS1 and SS2 soft-start charging current 5 µA
OSCILLATOR
FSW_BK Switching frequency Set by external resistor ROSC 0.3 1.4 MHz
FSW Programmable frequency ROSC = 250 kΩ 0.85 1 1.15 MHz
ROSC = 500 kΩ 425 500 575 kHz
PROTECTION
ILIMIT1 Buck 1 peak inductor current limit 4.5 V < VIN < 18 V 3.2 A
ILIMIT1_LS1 Buck 1 low side MOSFET current limit 4.5 V < VIN < 18 V 2 A
ILIMIT2 Buck 2 peak inductor current limit 4.5 V < VIN < 18 V 4.1 A
ILIMIT1_LS2 Buck 2 low side MOSFET current limit 4.5 V < VIN < 18 V 2 A
MOSFET ON-RESISTANCES
Rdson_HS1 On resistance of high side FET on CH1 BST1 to LX1 = 6.25 V 120 mΩ
Rdson_LS1 On resistance of low side FET on CH1 VIN = 12 V 80 mΩ
Rdson_HS2 On resistance of high side FET on CH2 BST2 to LX2 = 6.25 V 95 mΩ
Rdson_LS2 On resistance of low side FET on CH2 VIN = 12 V 50 mΩ
Ton_min Minimum in time 80 120 ns
THERMAL SHUTDOWN
TTRIP Thermal protection trip point Rising temperature 160 °C
THYST Thermal protection hysteresis 20 °C

7.6 Typical Characteristics

TA = 25°C, VIN = 12 V, fSW = 625 kHz (unless otherwise noted)
TPS65270 load_reg_lvsax7.gif
Buck 1 = 1.8 V 1% resistors
Figure 1. Load Regulation
TPS65270 new_lr_lvsax7.gif
Buck 1 = 3.3 V
Figure 3. Efficiency
TPS65270 eff_lvsax7.gif
Buck 1 = 3.3 V
Figure 5. Efficiency
TPS65270 load2_reg_lvsax7.gif
Buck 1 = 1.2 V 1% resistors
Figure 2. Load Regulation
TPS65270 new2_lr_lvsax7.gif
Buck 2 = 1 V
Figure 4. Efficiency
TPS65270 eff2_lvsax7.gif
Buck 2 = 5 V
Figure 6. Efficiency