SBVS067T January   2006  – December 2023 TPS737

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Noise
      2. 6.3.2 Internal Current Limit
      3. 6.3.3 Enable Pin and Shutdown
      4. 6.3.4 Reverse Current
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Dropout Voltage
        3. 7.2.2.3 Transient Response
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Power Dissipation
        2. 7.5.1.2 Thermal Protection
        3. 7.5.1.3 Estimating Junction Temperature
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCQ|6
  • DRV|6
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

for all voltage versions at TJ = 25°C, VIN = VOUT(nom) + 1 V, IOUT = 10 mA, VEN = 2.2 V, and COUT = 2.2 μF (unless otherwise noted)

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Legacy silicon
Figure 5-1 Load Regulation
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Legacy silicon 
Figure 5-3 Line Regulation
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Legacy silicon
Figure 5-5 Dropout Voltage vs Output Current
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Legacy silicon
Figure 5-7 Dropout Voltage vs Temperature
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Legacy silicon 
Figure 5-9 Output Voltage Histogram
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Legacy silicon 
Figure 5-11 Ground Pin Current vs Output Current
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Legacy silicon 
Figure 5-13 Ground Pin Current vs Temperature
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Legacy silicon 
Figure 5-15 Ground Pin Current in Shutdown vs Temperature
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Legacy silicon 
Figure 5-17 Current Limit vs VOUT (Foldback)
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New silicon, M3 suffix
Figure 5-19 Current Limit vs VIN
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New silicon, M3 suffix
Figure 5-21 Current Limit vs Temperature
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COUT = 1 μF, new silicon, M3 suffix
Figure 5-23 PSRR (Ripple Rejection) vs Frequency
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Legacy silicon
Figure 5-25 Noise Spectral Density
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New silicon, M3 suffix
Figure 5-27 TPS73701 RMS Noise Voltage vs CFB
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Legacy silicon 
Figure 5-29 RMS Noise Voltage vs CNR
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Legacy silicon 
Figure 5-31 TPS73733 Line Transient Response
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New silicon, M3 suffix
Figure 5-33 TPS73701 Turn-On Response
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New silicon, M3 suffix
Figure 5-35 TPS73701 Turn-Off Response
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New silicon, M3 suffix
Figure 5-37 TPS73701, VOUT = 3.3-V Power-Up and Power-Down
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Legacy silicon
Figure 5-39 TPS73701 RMS Noise Voltage vs CFB
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Legacy silicon
Figure 5-41 TPS73701 Load Transient, Adjustable Version
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 New silicon, M3 suffix
Figure 5-43 TPS73701 Line Transient, Adjustable Version
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New silicon, M3 suffix
Figure 5-2 Load Regulation
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New silicon, M3 suffix
Figure 5-4 Line Regulation
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New silicon, M3 suffix
Figure 5-6 Dropout Voltage vs Output Current
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New silicon, M3 suffix
Figure 5-8 Dropout Voltage vs Temperature
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Legacy silicon 
Figure 5-10 Output Voltage Drift Histogram
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New silicon, M3 suffix
Figure 5-12 Ground Pin Current vs Output Current
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New silicon, M3 suffix
Figure 5-14 Ground Pin Current vs Temperature
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New silicon, M3 suffix
Figure 5-16 Ground Pin Current in Shutdown vs Temperature
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Legacy silicon 
Figure 5-18 Current Limit vs VIN
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Legacy silicon
Figure 5-20 Current Limit vs Temperature
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Legacy silicon 
Figure 5-22 PSRR (Ripple Rejection) vs Frequency
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Legacy silicon 
Figure 5-24 PSRR (Ripple Rejection) vs (VIN – VOUT)
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Legacy silicon 
Figure 5-26 TPS73701 RMS Noise Voltage vs CFB
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Legacy silicon 
Figure 5-28 RMS Noise Voltage vs COUT
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Legacy silicon 
Figure 5-30 TPS73733 Load Transient Response
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Legacy silicon 
Figure 5-32 TPS73701 Turn-On Response
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Legacy silicon 
Figure 5-34 TPS73701 Turn-Off Response
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Legacy silicon 
Figure 5-36 TPS73701, VOUT = 3.3-V Power-Up and Power-Down
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Legacy silicon
Figure 5-38 IEN vs Temperature
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Legacy silicon 
Figure 5-40 TPS73701 IFB vs Temperature
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Legacy silicon
Figure 5-42 TPS73701 Line Transient, Adjustable Version