SCES853E November   2013  – October 2023 TXS0104E-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements—VCCA = 1.8 V ± 0.15 V
    7. 6.7  Timing Requirements—VCCA = 2.5 V ± 0.2 V
    8. 6.8  Timing Requirements—VCCA = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics—VCCA = 1.8 V ± 0.15 V
    10. 6.10 Switching Characteristics—VCCA = 2.5 V ± 0.2 V
    11. 6.11 Switching Characteristics—VCCA = 3.3 V ± 0.3 V
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Load Circuits
    2. 7.2 Voltage Waveforms
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Power Up
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pull Up and Pull Down Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
  12. 11Electrostatic Discharge Caution
  13. 12Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUT|12
  • PW|14
  • BQA|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TXS0104E-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track VCCA and VCCB respectively. The VCCB pin accepts any supply voltage from 2.3 V to 5.5 V while the VCCA pin accepts any supply voltage from 1.65 V to 3.6 V such that VCCA is less than or equal to VCCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E-Q1 device is designed so that the OE input circuit is supplied by VCCA.

To be in the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pull down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TXS0104E-Q1PW (TSSOP, 14)5 mm × 6.4 mm
BQA (WQFN, 14)3 mm × 2.5 mm
RUT (UQFN, 12)2 mm × 1.7 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.