SLUSDD5A April   2019  – December 2020 UC1825B-SP

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Methods
      2. 7.3.2 Synchronization
      3. 7.3.3 High Current Outputs
      4. 7.3.4 Open Loop Test Circuit
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 System Design Theory
        1. 8.2.1.1 Switching Frequency
        2. 8.2.1.2 Transformer
        3. 8.2.1.3 RCD and Diode Clamp
        4. 8.2.1.4 Output Diode
        5. 8.2.1.5 Main Switching MOSFETs
        6. 8.2.1.6 Output Filter and Capacitance
        7. 8.2.1.7 Compensation
        8. 8.2.1.8 Sense Resistor
    3. 8.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Feedback Traces
      2. 10.1.2 Input/Output Capacitors
      3. 10.1.3 Compensation Components
      4. 10.1.4 Traces and Ground Planes
      5. 10.1.5 Ground Planes
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Output Filter and Capacitance

For most designs, a ripple voltage is picked and the output capacitance is figured out from that value. The output capacitance value needs to be able to withstand a full output current step as well as keep the voltage ripple of the output low. The UC1825B-SP design started similar to that using the equations for voltage ripple and load step with Equation 35 and Equation 37.

Equation 35. Cout>Iout×2×DMAXVRipple×fosc
Equation 36. Cout>10 A×2×0.350 mV×200 kHz=600 μF
Equation 37. Cout>ΔIstep2π×ΔVout×fco
Equation 38. Cout>10 A2π×0.3 V×5 kHz=1060 μF

A value of around 1145 µF was chosen to keep output voltage ripple low. Note that the output voltage ripple in the design was further decreased by adding an output filter and by adding an inductor after a small portion of the output capacitance. This was done in order to keep output voltage ripple as low as possible. Six ceramic capacitors were picked to be placed before the output filter and then the large tantalum capacitors with some small ceramics were added to be part of the output filter. The initial ceramics will help with the initial current ripple, but have a very large output voltage ripple. This voltage ripple will be attenuated by the inductor and capacitor combination placed between the ceramic capacitors and the output. The equations below allow for finding the amount of attenuation that will come from a specific output filter inductance. An inductance of 500 nH was chosen to attenuate the output voltage ripple. The value was chosen to put the resonant frequency pole well before the switching frequency of the design as well as the zero from the ESR of the bulk capacitors to provide more attenuation.

Equation 39. Fresonant=12π×LFilter×CoBulk
Equation 40. Fresonant=12π×0.5 nH×1127 μF=6.7 kHz
Equation 41. FZero=12π×CoBulk×ESRoBulk
Equation 42. FZero=12π×1127 μF×0.009 Ω=15.69 kHz
Equation 43. Attenuationfsw=40×log10foscfresonant-20×log10foscfzero
Equation 44. Attenuationfsw=40×log10200 kHz6.7 kHz-20×log10200 kHz15.69 kHz =36.88 dB

Sometimes the output filter can cause peaking at high frequencies. This can be damped by adding a resistor in parallel with the inductor which will decrease efficiency. For the UC1825B-SP design 0.5 Ω was used as a very conservative value. The resistance needed to damp the peaking can be calculated using the following equations:

Equation 45. ωo=2(CoCerm+CoBulk)LFilter×CoCerm×CoBulk
Equation 46. ωo=2(19 μF+1127 μF)500 nH×19 μF×1127 μF=463 kHz
Equation 47. RFilter=Ro×LFilter×(CoCerm+CoBulk)-LFilterωoRo×(CoCerm+CoBulk)ωo-LFilter×CoCerm
Equation 48. RFilter=0.5×500 nH×(19 μF+1127 μF)-500 nH463 kHz0.5×(19 μF+1127 μF)463 kHz-500 nH×19 μF=0.232 Ω