8.2.2.2 Input Configuration

The UCC27611 offers both inverting (IN–) and noninverting (IN+) inputs to satisfy requirements for inverting and noninverting gate drive in a single device type. The design must specify what type of input-to-output configuration must be used. If turning on the power MOSFET when the input signal is in high state is preferred, then a device capable of the noninverting configuration must be selected. If turning off the power MOSFET when the input signal is in high state is preferred, then a device capable of the inverting configuration must be chosen. Once an input pin has been chosen for PWM drive, the other input pin (the unused input pin) must be properly biased to enable the output. The unused input pin cannot remain in a floating condition, because whenever any input pin is left in a floating condition, the output is disabled for safety purposes. Alternatively, the unused input pin can effectively be used to implement an enable and disable function, as explained below.

• To drive the device in a noninverting configuration, apply the PWM control input signal to IN+ pin. In this case, the unused input pin, IN–, must be biased low (tied to GND) to enable the output. Alternately, the IN– pin can be used to implement the enable and disable function using an external logic signal. OUT is disabled when IN– is biased high and OUT is enabled when IN– is biased low
• To drive the device in an inverting configuration, apply the PWM control input signal to IN– pin. In this case, the unused input pin, IN+, must be biased high (For example, tied to VDD) to enable the output. Alternately, the IN+ pin can be used to implement the enable and disable function using an external logic signal. OUT is disabled when IN+ is biased low and OUT is enabled when IN+ is biased high

The input stage of the driver must preferably be driven by a signal with a short rise or fall time. Take care whenever the driver is used with slowly varying input signals, especially in situations where the device is located in a mechanical socket, or PCB layout is not optimal. High dI/dt current from the driver output coupled with board layout parasitic can cause ground bounce. Because the device features just one GND pin, which may be referenced to the power ground, this may modify the differential voltage between input pins and GND and trigger an unintended change of output state. Because of fast 13-ns propagation delay, this can ultimately result in high-frequency oscillations, which increase power dissipation and pose risk of damage. In the worst case, when a slow input signal is used and PCB layout is not optimal, it may be necessary to add a small capacitor between input pin and ground very close to the driver device. This helps to convert the differential mode noise with respect to the input logic circuitry into common mode noise and avoid unintended change of output state.