SLVSCE5B November   2013  – July 2016 DRV3203E-Q1

 

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Supply Voltage and Current
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1  Watchdog
      2. 7.2.2  Serial Port I/F
        1. 7.2.2.1 CS - Chip Select
        2. 7.2.2.2 SCK - Synchronization Serial Clock
        3. 7.2.2.3 DIN - Serial Input Data
        4. 7.2.2.4 DOUT - Serial Output Data
      3. 7.2.3  Charge Pump
      4. 7.2.4  Pre-Driver
      5. 7.2.5  Phase Comparator
      6. 7.2.6  Motor-Current Sense
      7. 7.2.7  Regulators
      8. 7.2.8  VB Monitor
      9. 7.2.9  Thermal Shutdown
      10. 7.2.10 Oscillator
      11. 7.2.11 I/O
      12. 7.2.12 Fault Detection
    3. 7.3 Register Maps
      1. 7.3.1 Register Descriptions
        1. 7.3.1.1  CFGUNLK (address 0x01): Configuration Unlock Register
        2. 7.3.1.2  FLTCFG (address 0x02): Fault Detection Configuration Register
        3. 7.3.1.3  FLTEN0 (address 0x04): FAULT Pin Enable Register 0
        4. 7.3.1.4  FLTEN1 (address 0x05): FAULT Pin Enable Register 1
        5. 7.3.1.5  SDNEN0 (address 0x06): Pre-Driver Shutdown Enable Register 0
        6. 7.3.1.6  SDNEN1 (address 0x07): Pre-Driver Shutdown Enable Register 1
        7. 7.3.1.7  FLTFLG0 (address 0x08): Fault Flag Register 0
        8. 7.3.1.8  FLGFLT1 (address 0x09): Fault Flag Register 1
        9. 7.3.1.9  CSCFG (address 0x0A): Current Sense Configuration Register
        10. 7.3.1.10 PDCFG (address 0x0B): Pre-Driver Configuration Register
        11. 7.3.1.11 DIAG (address 0x0C): Diagnosis Register
        12. 7.3.1.12 SPARE (address 0x0D): Spare Register
  8. 8 Application and Implementation
    1. 8.1 Typical Application
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Community Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

PHP Package
48-PIN HTQFP
(Top View)
DRV3203E-Q1 PinOut_PHP-48_SLVSCE5.gif

Pin Functions

PIN MAXIMUM RATING FUNCTION
NAME NO. TYPE
ALFB 18 O –0.3 V to 40 V Motor current-sense amplifier feedback
ALM 16 I –0.3 V to 40 V Motor current- sense amplifier negative input
ALP 17 I –0.3 V to 40 V Motor current- sense amplifier positive input
ALV 15 O –0.3 V to 3.6 V Motor current- sense amplifier output
AREF 19 O –0.3 V to 40 V Reference output of motor current- sense amplifier
CPDR1 47 O –0.3 V to 40 V Charge-pump output
CPDR2 46 O –0.3 V to 40 V Charge- pump output
CPDR3 45 O –0.3 V to 40 V Charge- pump output
CPDR4 44 O –0.3 V to 40 V Charge- pump output
CS 32 I –0.3 V to 3.6 V SPI chip select
CTLUH 3 I –0.3 V to 3.6 V Pre-driver parallel input
CTLUL 9 I –0.3 V to 3.6 V Pre-driver parallel input
CTLVH 4 I –0.3 V to 3.6 V Pre-driver parallel input
CTLVL 10 I –0.3 V to 3.6 V Pre-driver parallel input
CTLWH 5 I –0.3 V to 3.6 V Pre-driver parallel input
CTLWL 11 I –0.3 V to 3.6 V Pre-driver parallel input
DIN 34 I –0.3 V to 3.6 V SPI data input
DOUT 30 O –0.3 V to 3.6 V SPI data output
ENABLE 23 I –0.3 V to 40 V Enable input
FAULT 36 O –0.3 V to 3.6 V Diagnosis output
GND 29 I –0.3 V to 0.3 V GND
NGND 48 I –0.3 V to 0.3 V Power GND
PDCPV 43 O –0.3 V to 40 V Charge pump output
PH1M 27 I –1 V to 40 V Phase comparator input
PH2M 26 I –1 V to 40 V Phase comparator input
PH3M 25 I –1 V to 40 V Phase comparator input
PHTM 28 I –1 V to 40 V Phase comparator reference input
PMV1 22 O –0.3 V to 3.6 V Phase comparator output
PMV2 21 O –0.3 V to 3.6 V Phase comparator output
PMV3 20 O –0.3 V to 3.6 V Phase comparator output
PRN 35 I –0.3 V to 3.6 V Watchdog timer-pulse input
RES 24 O –0.3 V to 3.6 V MCU reset output
SCK 33 I –0.3 V to 3.6 V SPI clock
TEST 2 I –0.3 V to 20 V TEST input
UH 42 O –5 V to 40 V Pre-driver output
UHS 41 O –5 V to 40 V Pre-driver reference
UL 6 O –0.3 V to 20 V Pre-driver output
VB 1 I –0.3 V to 40 V VB input
VCC 12 I –0.3 V to 3.6 V VCC supply input
VCCB 13 O –0.3 V to 40 V VCC regulator base driver of PNP external transistor
VCFB 14 I –0.3 V to 40 V VCC regulator current-sense input
VDD 31 O –0.3 V to 3.6 V VDD supply output
VH 40 O –5 V to 40 V Pre-driver output
VHS 39 O –5 V to 40 V Pre-driver reference
VL 7 O –0.3 V to 20 V Pre-driver output
WH 38 O –5 V to 40 V Pre-driver output
WHS 37 O –5 V to 40 V Pre-driver reference
WL 8 O –0.3 V to 20 V Pre-driver output