JAJSKH1C March   2022  – October 2023 LMH34400

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Electrical Characteristics: Logic Threshold and Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Clamping and Input Protection
      2. 6.3.2 ESD Protection
      3. 6.3.3 Single-Ended Output Stage
    4. 6.4 Device Functional Modes
      1. 6.4.1 Ambient Light Cancellation Mode
      2. 6.4.2 Power-Down Mode (Multiplexer Mode)
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 LMH34400 Test Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 LMH34400 Signal Chain With Comparator
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at VDD = 3.3 V, CPD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), RL = 100 Ω, and TA = 25°C (unless otherwise noted)

GUID-20220122-SS0I-3T9L-RT3V-TKTLQJL7J4SS-low.svg
VOUT = 100 mVPP
Figure 5-1 Small-Signal Response vs Input Capacitance
GUID-20220122-SS0I-0TMW-QTBF-DJS122XL3ZGL-low.svg
VOUT = 100 mVPP
Figure 5-3 Small-Signal Response vs Ambient Temperature
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IDC_IN = 100 μA
Figure 5-5 Low-side Frequency Response vs Ambient Light Cancellation
GUID-20220124-SS0I-QCS7-CFKZ-PFRDP1GCZMRS-low.svg
 
Figure 5-7 Input Noise Density vs Ambient Temperature
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IDC_EN = 0 V
Figure 5-9 Input Noise Density vs Ambient Light DC Current
GUID-20220817-SS0I-ZDBV-GRJL-VGCXHFC2N2TX-low.svg
 
Figure 5-11 Overloaded Pulse Response
GUID-20220129-SS0I-JFQP-ZDVR-3JG2MF6DNRWF-low.svg
 
Figure 5-13 Turn-Off Time
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IDC_IN = 100 µA → 0 µA
Figure 5-15 Ambient Loop Cancellation Settling Time
GUID-20220129-SS0I-RNSD-1621-Q6J4ZWMSPJNT-low.svg
 
Figure 5-17 Input Bias Voltage vs Supply Voltage
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Figure 5-19 Quiescent Current vs Ambient Temperature
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Figure 5-21 Output Voltage vs Input Current
GUID-20220817-SS0I-RSLZ-HJZ0-ZPDTH6DLTFNL-low.svg
μ = 21.1 mA, σ = 0.38 mA
Figure 5-23 Quiescent Current Distribution
GUID-20220817-SS0I-QZ0J-LVNF-KJDCVVZBW9TQ-low.svg
μ = 0.99 V, σ = 0.0073 V
Figure 5-25 Default Output Voltage Distribution
GUID-20220817-SS0I-GKKC-PWKC-3VZVDPQB5LBZ-low.svg
μ = 1.6 kΩ, σ = 0.013 kΩ, device disabled
Figure 5-27 Output Impedance (ZOUT) Distribution
GUID-20220122-SS0I-0DVP-3LB1-HC5NN61P8V4L-low.svg
VOUT = 1 VPP
Figure 5-2 Large-Signal Response vs Input Capacitance
GUID-20220817-SS0I-FGZL-LR7G-3JDTHRDMDJ4M-low.svg
VOUT = 1 VPP
Figure 5-4 Large-Signal Response vs Ambient Temperature
GUID-20220124-SS0I-FLGD-3XTW-PBXBVBKBMLQ2-low.svg
 
Figure 5-6 Closed-Loop Output Impedance vs Frequency
GUID-20220124-SS0I-H1V4-TCBQ-X0C659VTP4Z2-low.svg
 
Figure 5-8 Input Noise Density vs Input Capacitance
GUID-20220129-SS0I-B2PQ-SSPP-TJHCCNCKRVNG-low.svg
 
Figure 5-10 Pulse Response vs Output Swing
GUID-20220129-SS0I-0DLL-1NBW-T5RCDRRG1BLK-low.svg
 
Figure 5-12 Turn-On Time
GUID-20220207-SS0I-K0PL-JKBV-HR0CJZTSPRRP-low.svg
IDC_IN = 0 µA → 100 µA
Figure 5-14 Ambient Loop Cancellation Settling Time
GUID-20220129-SS0I-TXMB-HSWS-PCJKWRQN9QRF-low.svg
Positive current is sinking current into the photodiode cathode
Figure 5-16 Transimpedance Gain vs Input Current
GUID-20220129-SS0I-M9J5-CDGH-2BZ1LJP5DZQH-low.svg
 
Figure 5-18 Input Bias Voltage vs Ambient Temperature
GUID-20220129-SS0I-9GC9-C4J7-WFPKD905WP8C-low.svg
 
Figure 5-20 Quiescent Current vs Supply Voltage
GUID-20220129-SS0I-DZKL-6JGJ-0BZPKGFMCSK4-low.svg
 
Figure 5-22 Logic Threshold vs Ambient Temperature
GUID-20220817-SS0I-RNDW-NQKL-Q9PSNXXZVTFP-low.svg
μ = 38.5 kΩ, σ = 1.2 kΩ
Figure 5-24 Transimpedance Gain Distribution
GUID-20220817-SS0I-WXWK-6F8B-XWZZCXSVD784-low.svg
μ = 11 Ω, σ = 0.38 Ω, device enabled
Figure 5-26 Output Impedance (ZOUT) Distribution