JAJSDO2C August   2017  – October 2023 OPA838

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 5 V
    6. 7.6 Electrical Characteristics: VS = 3 V
    7. 7.7 Typical Characteristics: VS = 5 V
    8. 7.8 Typical Characteristics: VS = 3 V
    9. 7.9 Typical Characteristics: Over Supply Range
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
      2. 8.3.2 Output Voltage Range
      3. 8.3.3 Power-Down Operation
      4. 8.3.4 Trade-Offs in Selecting The Feedback Resistor Value
      5. 8.3.5 Driving Capacitive Loads
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (±1.35 V to ±2.7 V)
      2. 8.4.2 Single-Supply Operation (2.7 V to 5.4 V)
      3. 8.4.3 Power Shutdown Operation
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Noninverting Amplifier
      2. 9.1.2 Inverting Amplifier
      3. 9.1.3 Output DC Error Calculations
      4. 9.1.4 Output Noise Calculations
    2. 9.2 Typical Applications
      1. 9.2.1 High-Gain Differential I/O Designs
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Transimpedance Amplifier
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 TINA-TI™ Simulation Model Features
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12.   Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Power Shutdown Operation

As noted, the 6-pin packages that offer a power-shutdown feature must have that pin asserted. To retain the lowest possible shutdown power, no internal pullup resistors are present in the OPA838. The control threshold is referenced off the negative supply with a nominal internal threshold near 1 V greater than the negative supply. Worst-case tolerances dictate the required low-level voltage to provide a shutdown of 0.55 V (or less) greater than the negative supply, and 1.5 V (or more) greater than the negative supply to maintain enabled operation. The required control pin current is less than ±50 nA. For SOT‑23‑6 applications that do not require a shutdown functionality, connect the disable control pin to the positive supply. For SC70 package applications that do not require a shutdown, use the 5-pin package where the control pad is internally connected to the positive supply. When disabled, the output nominally goes to a high-impedance state. However, the feedback network provides a path for discharge for an off-state voltage condition. Figure 7-51 illustrates the turn-on time with a sinusoidal input that is relatively slow, while Figure 7-52 illustrates the turn-off time is fast. Figure 7-53 and Figure 7-54 illustrate the single-supply operation with a dc input to produce a midsupply output at gains of 6 V/V and 10 V/V. In all cases, the output voltage transitions to a point close to the positive supply voltage and then moves to the desired output voltage 0.5 µs to 1.5 µs after the disable control line goes high. The supply current in shutdown is a low 0.1 µA nominally with a maximum 1 µA.