JAJSQG3B march 2022 – may 2023 TPS389006-Q1
PRODUCTION DATA
The TPS389006-Q1 combines two comparators with a precision reference voltage and a trimmed resistor divider per monitor (MON) channel. This configuration optimizes device accuracy because all resistor tolerances are accounted for in the accuracy and performance specifications. Both comparators also include built-in hysteresis that provides noise immunity and ensures stable operation.
Although not required in most cases, for noisy applications good analog design practice is to place a 1-nF to 10-nF bypass capacitor at the MON input in order to reduce sensitivity to transient voltages on the monitored signal. Specific deglitch times can also be set independently for each MON via I2C registers
When monitoring VDD supply voltage, the MON pin can be connected directly to VDD. The output (NIRQ) is high impedance when voltage at the MON pin is between upper and lower boundary of threshold.