JAJSI75A April   2018  – November 2019 TPS57112C-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流との関係
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics Curves
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fixed-Frequency PWM Control
      2. 8.3.2 Slope Compensation and Output Current
      3. 8.3.3 Bootstrap Voltage (BOOT) and Low-Dropout Operation
        1. 8.3.3.1 Error Amplifier
      4. 8.3.4 Voltage Reference
    4. 8.4 Device Functional Modes
      1. 8.4.1  Adjusting the Output Voltage
      2. 8.4.2  Enable Functionality and Adjusting Undervoltage Lockout
      3. 8.4.3  Slow-Start or Tracking Pin
      4. 8.4.4  Sequencing
      5. 8.4.5  Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      6. 8.4.6  Overcurrent Protection
      7. 8.4.7  Frequency Shift
      8. 8.4.8  Reverse Overcurrent Protection
      9. 8.4.9  Synchronize Using the RT/CLK Pin
      10. 8.4.10 Power Good (PWRGD Pin)
      11. 8.4.11 Overvoltage Transient Protection
      12. 8.4.12 Thermal Shutdown
      13. 8.4.13 Small-Signal Model for Loop Response
      14. 8.4.14 Simple Small-Signal Model for Peak-Current-Mode Control
      15. 8.4.15 Small-Signal Model for Frequency Compensation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting the Switching Frequency
        2. 9.2.2.2 Output Inductor Selection
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Slow-Start Capacitor
        6. 9.2.2.6 Bootstrap Capacitor Selection
        7. 9.2.2.7 Output Voltage and Feedback Resistor Selection
        8. 9.2.2.8 Compensation
        9. 9.2.2.9 Power-Dissipation Estimate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 12.1.2 開発サポート
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Output Capacitor

There are three primary considerations for selecting the value of the output capacitor. The output capacitor determines the modulator pole, the output voltage ripple, and how the regulator responds to a large change in load current. The output capacitance must be selected based on the most-stringent of these three criteria.

The desired response to a large change in the load current is the first criterion. The output capacitor must supply the load with current when the regulator cannot. This situation would occur if there are desired hold-up times for the regulator where the output capacitor must hold the output voltage above a certain level for a specified amount of time after removal of the input power. The regulator is temporarily not able to supply sufficient output current if there is a large, fast increase in the current needs of the load, such as transitioning from no load to a full load. The regulator usually needs two or more clock cycles for the control loop to see the change in load current and output voltage and adjust the duty cycle to react to the change. Sizing of the output capacitor must be adequate to supply the extra current to the load until the control loop responds to the load change. The output capacitance must be large enough to supply the difference in current for two clock cycles while only allowing a tolerable amount of droop in the output voltage. Equation 25 shows the minimum output capacitance necessary to meet this requirement.

For this example, the transient load response is specified as a 5% change in VO for a load step from 0 A (no load) to 1.5 A (50% load). For this example, ΔIO = 1.5 A – 0 A = 1.5 A and ΔVO = 0.05 × 1.8 = 0.09 V. Using these numbers gives a minimum capacitance of 33 μF. This value does not take the ESR of the output capacitor into account in the output voltage change. For ceramic capacitors, the ESR is usually small enough to ignore in this calculation.

Equation 26 calculates the minimum output capacitance needed to meet the output voltage ripple specification. In this case, the maximum output-voltage ripple is 30 mV. Under this requirement, Equation 26 yields 2.3 µF.

Equation 25. TPS57112C-Q1 eq16_co_SLVSAH5.gif

where

  • ΔIO is the change in output current
  • f(SW) is the switching frequency of the regulator
  • ΔVO is the allowable change in the output voltage
Equation 26. TPS57112C-Q1 eq17_co_SLVSAH5.gif

where

  • f(SW) is the switching frequency
  • VO(ripple) is the maximum allowable output voltage ripple
  • I(ripple) is the inductor ripple current

Equation 27 calculates the maximum ESR an output capacitor can have to meet the output-voltage ripple specification. Equation 27 indicates the ESR should be less than 55 mΩ. In this case, the ESR of the ceramic capacitor is much less than 55 mΩ.

Factor in additional capacitance de-ratings for aging, temperature, and dc bias, which increase this minimum value. For this example, use two 22-μF 10-V X5R ceramic capacitors with 3 mΩ of ESR.

Capacitors generally have limits to the amount of ripple current they can handle without failing or producing excess heat. Specify an output capacitor that can support the inductor ripple current. Some capacitor data sheets specify the root-mean-square (RMS) value of the maximum ripple current. One can use Equation 28 to calculate the rms ripple current the output capacitor must support. For this application, Equation 28 yields 333 mA.

Equation 27. TPS57112C-Q1 eq18_resr_SLVSAH5.gif
Equation 28. TPS57112C-Q1 eq19_icor_SLVSAH5.gif