SLVSA31A November   2009  – December 2014 TPS61029-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
  9. 9 Typical Characteristics
  10. 10Parameter Measurement Information
  11. 11Detailed Description
    1. 11.1 Functional Block Diagram (TPS61029)
    2. 11.2 Feature Description
      1. 11.2.1 Controller Circuit
        1. 11.2.1.1 Synchronous Rectifier
        2. 11.2.1.2 Down Regulation
        3. 11.2.1.3 Device Enable
        4. 11.2.1.4 Softstart and Short Circuit Protection
        5. 11.2.1.5 Low Battery Detector Circuit—LBI/LBO
        6. 11.2.1.6 Low-EMI Switch
    3. 11.3 Device Functional Modes
      1. 11.3.1 Undervoltage Lockout
      2. 11.3.2 Power Save Mode
    4. 11.4 Programming
      1. 11.4.1 Programming the Output Voltage
      2. 11.4.2 Programming the LBI/LBO Threshold Voltage
  12. 12Application and Implementation
    1. 12.1 Application Information
      1. 12.1.1 Application Examples
    2. 12.2 Typical Application
      1. 12.2.1 Design Requirements
        1. 12.2.1.1 Inductor Selection
        2. 12.2.1.2 Input Capacitor
        3. 12.2.1.3 Output Capacitor
      2. 12.2.2 Detailed Design Procedure
        1. 12.2.2.1 Small Signal Stability
        2. 12.2.2.2 Thermal Information
      3. 12.2.3 Application Curves
  13. 13Power Supply Recommendations
  14. 14Layout
    1. 14.1 Layout Guidelines
    2. 14.2 Layout Example
  15. 15Device and Documentation Support
    1. 15.1 Documentation Support
      1. 15.1.1 Third-Party Products Disclaimer
    2. 15.2 Related Links
    3. 15.3 Trademarks
    4. 15.4 Electrostatic Discharge Caution
    5. 15.5 Glossary
  16. 16Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DPN|10
  • DRC|10
サーマルパッド・メカニカル・データ
発注情報

7 Pin Configuration and Functions

VSON (DRC) (DPN)
10-Pin Package
TOP VIEW
po_lvs541.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
EN 1 I Enable input (1/VBAT enabled, 0/GND disabled)
FB 3 I Voltage feedback of adjustable versions
GND 5 Control / logic ground
LBI 7 I Low battery comparator input (comparator enabled with EN), may not be left floating, should be connected to GND or VBAT if comparator is not used
LBO 4 O Low battery comparator output (open drain)
PS 8 I Enable/disable power save mode (1/VBAT disabled, 0/GND enabled)
SW 9 I Boost and rectifying switch input
PGND 10 Power ground
VBAT 6 I Supply voltage
VOUT 2 O Boost converter output
PowerPAD™ Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.