JAJSFK4A September   2018  – November 2018 TPS61088-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable and Start-up
      2. 8.3.2 Undervoltage Lockout (UVLO)
      3. 8.3.3 Adjustable Switching Frequency
      4. 8.3.4 Adjustable Peak Current Limit
      5. 8.3.5 Overvoltage Protection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation
        1. 8.4.1.1 PWM Mode
        2. 8.4.1.2 PFM Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design with WEBENCH Tools
        2. 9.2.2.2 Setting Switching Frequency
        3. 9.2.2.3 Setting Peak Current Limit
        4. 9.2.2.4 Setting Output Voltage
        5. 9.2.2.5 Inductor Selection
        6. 9.2.2.6 Input Capacitor Selection
        7. 9.2.2.7 Output Capacitor Selection
        8. 9.2.2.8 Loop Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 12.1.2 開発サポート
        1. 12.1.2.1 WEBENCHツールによるカスタム設計の作成
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.2.7 Output Capacitor Selection

For small output voltage ripple, TI recommends a low-ESR output capacitor like a ceramic capacitor. Typically, three 22-μF ceramic output capacitors work for most applications. Higher capacitor values can be used to improve the load transient response. Take care when evaluating a capacitor’s derating under DC bias. The bias can significantly reduce capacitance. Ceramic capacitors can lose most of their capacitance at rated voltage. Therefore, leave margin on the voltage rating to ensure adequate effective capacitance. From the required output voltage ripple, use the following equations to calculate the minimum required effective caapctance COUT:

Equation 11. TPS61088-Q1 eq_7_LVSCW6.gif
Equation 12. TPS61088-Q1 eq_8_LVSCM8.gif

where

  • Vripple_dis is output voltage ripple caused by charging and discharging of the output capacitor.
  • Vripple_ESR is output voltage ripple caused by ESR of the output capacitor.
  • VIN_MIN is the minimum input voltage of boost converter.
  • VOUT is the output voltage.
  • IOUT is the output current.
  • ILpeak is the peak current of the inductor.
  • ƒSW is the converter switching frequency.
  • RC_ESR is the ESR of the output capacitors.