SLVSC26A November   2013  – June 2015 TPS61162A , TPS61163A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 EasyScale Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Converter
      2. 7.3.2  IFBx Pin Unused
      3. 7.3.3  Enable and Start-up
      4. 7.3.4  Soft Start
      5. 7.3.5  Full-Scale Current Program
      6. 7.3.6  Brightness Control
      7. 7.3.7  Undervoltage Lockout
      8. 7.3.8  Overvoltage Protection
      9. 7.3.9  Overcurrent Protection
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 One-Wire Digital Interface (EasyScale Interface)
      2. 7.4.2 PWM Control Interface
    5. 7.5 Programming
      1. 7.5.1 EasyScale Programming
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Schottky Diode Selection
        3. 8.2.2.3 Compensation Capacitor Selection
        4. 8.2.2.4 Output Capacitor Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 Additional Application Circuits
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

7 Detailed Description

7.1 Overview

The TPS61162A, TPS61163A is a high-efficiency, dual-channel white LED driver for smart-phone backlighting applications. Two current sink regulators of high current-matching capability are integrated in the TPS61162A,TPS61163A to support dual LED strings connection and to improve the current balance and protect the LED diodes when either LED string is open or short.

The TPS61162A, TPS61163A has integrated all of the key function blocks to power and control up to 20 white LED diodes. It includes a 1.5-A, 40-V boost converter, two current-sink regulators, and protection circuit for overcurrent, overvoltage, and thermal shutdown protection.

In order to provide high brightness backlighting for large size or high resolution smart phone panels, more and more white LED diodes are used. Having all LED diodes in a string improves overall current matching; however, the output voltage of a boost converter will be limited when input voltage is low, and normally the efficiency will drop when output voltage goes very high. Thus, the LED diodes are arranged in two parallel strings.

7.2 Functional Block Diagram

TPS61162A TPS61163A fbd_lvsc26.gif

7.3 Feature Description

7.3.1 Boost Converter

The boost converter of the TPS61162A, TPS61163A integrates a 1.5-A, 40-V low-side switch MOSFET and has a fixed switching frequency of 1.2 MHz. The control architecture is based on traditional current-mode Pulse Width Modulation (PWM) control. For operation see the Functional Block Diagram. Two current sinks regulate the dual-channel current, and the boost output is automatically set by regulating voltage on the IFBx pin. The output of error amplifier and the sensed current of switch MOSFET are applied to a control comparator to generate the boost switching duty cycle; slope compensation is added to the current signal to allow stable operation for duty cycles larger than 50%.

The forward voltages of two LED strings are normally different due to the LED diode forward voltage inconsistency; thus, the IFB1 and IFB2 voltages are normally different. The TPS61162A, TPS61163A can select out the IFBx pin which has a lower voltage than the other and regulate its voltage to a very low value (90 mV typical), which is enough for the two current sinks' headroom. In this way, the output voltage of the boost converter is automatically set and adaptive to LED strings' forward voltages, and the power dissipation of the current sink regulators can be reduced remarkably with this very low headroom voltage.

In order to improve the boost efficiency at light load, Pulse Frequency Modulation (PFM) mode is automatically enabled under light load conditions. When the load current decreases along with the dimming duty, the output of gm amplifier — COMP pin voltage decreases until it is clamped at an internal reference voltage. Because COMP pin voltage controls the inductor peak current, when it is clamped the inductor peak current is also clamped and cannot decrease. As a result, more energy than needed is transferred to the output stage, and the output voltage and IFBx pin voltage increase. An internal hysteresis comparator detects the minimum IFBx pin voltage. When the minimum IFBx voltage is detected as higher than the regulation voltage 90 mV by around 120 mV, the boost stops switching. Then the output voltage, as well as IFBx pin voltage, decrease. When the minimum IFBx voltage is lower than the hysteresis (around 40 mV), the boost switches again. Thus, during PFM mode the boost output trips between the low and high thresholds. When the load increases along with the dimming duty, the COMP pin voltage will exit from the clamped status, and the boost will exit the PFM mode and return to the PWM operation, during which the minimum IFBx pin voltage is regulated at 90 mV again. Refer to Figure 23 and Figure 24 for PFM mode operation.

7.3.2 IFBx Pin Unused

If only one channel is needed, a user can easily disable the unused channel by connecting its IFBx pin to ground. If both IFBx pins are connected to ground, the device will not start up.

7.3.3 Enable and Start-up

In order to enable the device from shutdown mode, three conditions have to be met:

  1. POR (Power On Reset, that is, VIN voltage is higher than UVLO threshold);
  2. Logic high on EN pin; and
  3. PWM signal (logic high or PWM pulses) on PWM pin.
When these conditions are all met, an internal LDO linear regulator is enabled to provide supply to internal circuits and the device can start up.

The TPS61162A, TPS61163A support two dimming interfaces: one-wire digital interface (EasyScale interface) and PWM interface. TPS61162A, TPS61163A begin an EasyScale detection window after start-up to detect which interface is selected. If the EasyScale interface is needed, signals of a specific pattern should be input into EN pin during the EasyScale detection window; otherwise, PWM dimming interface will be enabled (see details in One-Wire Digital Interface (EasyScale Interface)).

After the EasyScale detection window, the TPS61162A, TPS61163A check the status of IFBx pins. If one IFBx pin is detected to connect to ground, the corresponding channel will be disabled and removed from the control loop. Then the soft-start begins, and the boost converter starts switching. If both IFBx pins are shorted to ground, the TPS61162A, TPS61163A will not start up.

Either pulling EN pin low for more than 2.5 ms or pulling PWM pin low for more than 20 ms can disable the device, and the TPS61162A, TPS61163A enters into shutdown mode.

If the EasyScale is selected as unique control to enable/disable and change brightness for TPS61162A,TPS61163A, it is required to pull EN pin more than 100 ms to enable the TPS61162A, TPS61163A from the previous disable. The 100-ms time period can ensure the fully voltage discharge remained on IFBx pin.

7.3.4 Soft Start

Soft start is implemented internally to prevent voltage over-shoot and in-rush current. After the IFBx pin status detection, the COMP pin voltage starts ramp up, and the boost starts switching. During the beginning 5 ms (tHalf_LIM) of the switching, the peak current of the switch MOSFET is limited at ILIM_Start (0.7 A typical) to avoid the input inrush current. After the 5 ms, the current limit is changed to ILIM (1.5 A typical) to allow the normal operation of the boost converter.

7.3.5 Full-Scale Current Program

The dual channels of the TPS61162A, TPS61163A can provide up to 30 mA current each. It does not matter whether either the EasyScale interface or PWM interface is selected, the full-scale current (current when dimming duty cycle is 100%) of each channel should be programmed by an external resistor RISET at the ISET pin according to Equation 1.

Equation 1. TPS61162A TPS61163A eq1_Ifbfull_lvsbq2.gif

where

  • IFB_full, full-scale current of each channel
  • KISET_full = 1030 (Current multiple when dimming duty cycle = 100%)
  • VISET_full = 1.229 V (ISET pin voltage when dimming duty cycle = 100%)
  • RISET = ISET pin resistor

7.3.6 Brightness Control

The TPS61162A, TPS61163A controls the DC current of the dual channels to realize the brightness dimming. The DC current control is normally referred to as analog dimming mode. When the DC current of LED diode is reduced, the brightness is dimmed.

The TPS61162A, TPS61163A can receive either the PWM signals at the PWM pin (PWM interface) or digital commands at the EN pin (EasyScale interface) for brightness dimming. If the EasyScale interface is selected, the PWM pin should be kept high; if PWM interface is selected, the EN pin should be kept high.

7.3.7 Undervoltage Lockout

An undervoltage lockout circuit prevents the operation of the device at input voltages below undervoltage threshold (2.2 V typical). When the input voltage is below the threshold, the device is shut down. If the input voltage rises by undervoltage lockout hysteresis, the device restarts.

7.3.8 Overvoltage Protection

Overvoltage protection circuitry prevents device damage as the result of white LED string disconnection or shortage.

The TPS61162A/TPS61163A monitors the voltages at SW pin and IFBx pin during each switching cycle. No matter either SW OVP threshold VOVP_SW or IFBx OVP threshold VOVP_FB is reached due to the LED string open or short issue, the protection circuitry will be triggered. Refer to Figure 6 and Figure 7 for the protection actions.

If one LED string is open, its IFBx pin voltage drops, and the boost output voltage is increased by the control loop as it tries to regulate this lower IFBx voltage to the target value (90mV typical). For the normal string, its current is still under regulation but its IFBx voltage increases along with the output voltage. During the process, either the SW voltage reaches its OVP threshold VOVP_SW or the normal string’s IFBx pin voltage reaches the IFBx OVP threshold VOVP_FB, then the protection circuitry will be triggered accordingly.

If both LED strings are open, both IFBx pins’ voltages drop to ground, and the boost output voltage is increased by the control loop until reaching the SW OVP threshold VOVP_SW, the SW OVP protection circuitry is triggered, and the device is latched off. Only VIN POR or EN/PWM pin toggling can restart the IC.

One LED diode short in a string is allowed for the TPS61162A, TPS61163A. If one LED diode in a string is short, the normal string’s IFBx voltage is regulated to about 90 mV, and the abnormal string’s IFBx pin voltage will be higher. Normally with only one diode short, the higher IFBx pin voltage does not reach the IFBx OVP threshold VOVP_FB, so the protection circuitry will not be triggered.

If more than one LED diodes are short in a string, as the boost loop regulates the normal string’s IFBx voltage to 90 mV, this abnormal string’s IFBx pin voltage is much higher and will reach VOVP_FB, then the protection circuitry is triggered.

The SW OVP protection will also be triggered when the forward voltage drop of an LED string exceeds the SW OVP threshold. In this case, the device turns off the switch FET and shuts down.

TPS61162A TPS61163A SW_OVP_lvsbq2.gifFigure 6. SW OVP Action
TPS61162A TPS61163A VIFB_OVP_lvsbq2.gifFigure 7. VIFBx OVP Action

7.3.9 Overcurrent Protection

The TPS61162A, TPS61163A have a pulse-by-pulse overcurrent limit. The boost switch turns off when the inductor current reaches this current threshold, and it remains off until the beginning of the next switching cycle. This protects the TPS61162A, TPS61163A and external component under overload conditions.

7.3.10 Thermal Shutdown

An internal thermal shutdown turns off the device when the typical junction temperature of 160°C is exceeded. The device is released from shutdown automatically when the junction temperature decreases by 15°C.

7.4 Device Functional Modes

7.4.1 One-Wire Digital Interface (EasyScale Interface)

The EN pin features a simple digital interface to allow digital brightness control. The digital dimming interface can save the processor power and battery life as it does not require PWM signals all the time, and the processor can enter idle mode if possible. In order to enable the EasyScale interface, the following conditions must be satisfied, and the specific digital pattern on the EN pin must be recognized by the device every time the TPS61162A, TPS61163A starts up from shutdown mode.

  1. VIN voltage is higher than UVLO threshold, and PWM pin is pulled high.
  2. Pull EN pin from low to high to enable the TPS61162A, TPS61163A. At this moment, the EasyScale detection window starts.
  3. After EasyScale detection delay time (tes_delay, 100 µs), drive EN to low for more than EasyScale detection time (tes_detect, 260 µs).

The third step must be finished before the EasyScale detection window (tes_win, 1 ms) expires, and once this step is finished, the EasyScale interface is enabled, and the EasyScale communication can start. Refer to Figure 8 for a graphical explanation.

TPS61162A TPS61163A easy_int_det_lvsbq2.gifFigure 8. Easyscale Interface Detection

The TPS61162A, TPS61163A support 9-bit brightness code programming. By the EasyScale interface, a master can program the 9-bit code D8(MSB) to D0(LSB) to any of 511 steps with a single command. The default code value of D8~D0 is “111111111” when the device is first enabled, and the programmed value will be stored in an internal register and set the dual-channel current according to Equation 2. The code will be reset to default value when the device is shut down or disabled.

Equation 2. TPS61162A TPS61163A eq2_Ifbx_lvsbq2.gif

where

  • IFB_full: the full-scale LED current set by the RISET at ISET pin.
  • Code: the 9-bit brightness code D8~D0 programmed by EasyScale interface

When the one-wire digital interface at EN pin is selected, the PWM pin can be connected to either the VIN pin or a GPIO (refer to Additional Application Circuits). If PWM pin is connected to VIN pin, EN pin alone can enable and disable the device — pulling EN pin low for more than 2.5 ms disables the device; if PWM pin is connected to a GPIO, both PWM and EN signals should be high to enable the device, and either pulling EN pin low for more than 2.5 ms or pulling PWM pin low for more than 20 ms disables the device.

7.4.2 PWM Control Interface

The PWM control interface is automatically enabled if the EasyScale interface fails to be enabled during startup. In this case, the TPS61162A, TPS61163A receives PWM dimming signals on the PWM pin to control the backlight brightness. When using PWM interface, the EN pin can be connected to VIN pin or a GPIO (refer to Additional Application Circuits). If EN pin is connected to VIN pin, PWM pin alone is used to enable and disable the device: pulling PWM pin high or apply PWM signals at PWM pin to enable the device and pulling PWM pin low for more than 20 ms to disable the device; if EN pin is connected to a GPIO, either pulling EN pin low for more than 2.5 ms or pulling PWM pin low for more than 20 ms can disable the device. Only after both EN and PWM signals are applied, the TPS61162A/TPS61163A can start up. Refer to Figure 9 for a graphical explanation.

TPS61162A TPS61163A PWM_con_int_det_lvsbq2.gifFigure 9. PWM Control Interface Detection

When the PWM pin is constantly high, the dual channel current is regulated to full scale according to Equation 1. The PWM pin allows PWM signals to reduce this regulation current according to the PWM duty cycle; therefore, it achieves LED brightness dimming. The relationship between the PWM duty cycle and IFBx current is given by Equation 3.

Equation 3. TPS61162A TPS61163A eq3_Ifbx_lvsbq2.gif

where

  • IFBx is the current of each current sink
  • IFB_full is the full-scale LED current
  • Duty is the duty cycle information detected from the PWM signals

7.5 Programming

7.5.1 EasyScale Programming

EasyScale is a simple, but flexible, one-pin interface to configure the current of the dual channels. The interface is based on a master-slave structure, where the master is typically a microcontroller or application processor and the device is the slave. Figure 10 and Table 1 give an overview of the protocol used by TPS61162A/TPS61163A. A command consists of 24 bits, including an 8-bit device address byte and a 16-bit data byte. All of the 24 bits should be transmitted together each time, and the LSB bit should be transmitted first. The device address byte D7(MSB)~D0(LSB) is fixed to 0x8F. The data byte includes 9 bits D8(MSB)~D0(LSB) for brightness information and an RFA bit. The RFA bit set to "1" indicates the Request for Acknowledge condition. The Acknowledge condition is only applied when the protocol is received correctly. The advantage of EasyScale compared with other one pin interfaces is that its bit detection is in a large extent independent from the bit transmission rate. It can automatically detect bit rates between 1.7 kBit/sec and up to 160 kBit/sec.

TPS61162A TPS61163A ES_Proto_Over_lvsbq2.gifFigure 10. Easyscale Protocol Overview

Table 1. Easyscale Bit Description

BYTE BIT NUMBER NAME TRANSMISSION DIRECTION DESCRIPTION
Device Address Byte (0x8F) 23 (MSB) DA7 IN DA7 = 1, MSB of device address
22 DA6 DA6 = 0
21 DA5 DA5 = 0
20 DA4 DA4 = 0
19 DA3 DA3 = 1
18 DA2 DA2 = 1
17 DA1 DA1 = 1
16 DA0 DA0 = 1, LSB of device address
Data Byte 15 Bit 15 IN No information. Write 0 to this bit.
14 Bit 14 No information. Write 0 to this bit.
13 Bit 13 No information. Write 0 to this bit.
12 Bit 12 No information. Write 0 to this bit.
11 Bit 11 No information. Write 0 to this bit.
10 RFA Request for acknowledge. If set to 1, device will pull low the data line when it receives the command well. This feature can only be used when the master has an open drain output stage and the data line needs to be pulled high by the master with a pullup resistor; otherwise, acknowledge condition is not allowed and don't set this bit to 1.
9 Bit 9 No information. Write 0 to this bit.
8 D8 Data bit 8, MSB of brightness code
7 D7 Data bit 7
6 D6 Data bit 6
5 D5 Data bit 5
4 D4 Data bit 4
3 D3 Data bit 3
2 D2 Data bit 2
1 D1 Data bit 1
0 (LSB) D0 Data bit 0, LSB of brightness code
TPS61162A TPS61163A ES_tim_RFA_0_lvsbq2.gifFigure 11. Easyscale Timing, With RFA = 0
TPS61162A TPS61163A ES_tim_RFA_1_lvsbq2.gifFigure 12. Easyscale Timing, With RFA = 1
TPS61162A TPS61163A ES_bit_code_lvsbq2.gifFigure 13. Easyscale — Bit Coding

The 24-bit command should be transmitted with LSB first and MSB last. Figure 11 shows the protocol without acknowledge request (Bit RFA = 0), Figure 12 with acknowledge request (Bit RFA = 1). Before the command transmission, a start condition must be applied. For this, the EN pin must be pulled high for at least tstart (2 μs) before the bit transmission starts with the falling edge. If the EN pin is already at high level, no start condition is needed. The transmission of each command is closed with an End of Stream condition for at least tEOS (2 μs).

The bit detection is based on a Logic Detection scheme, where the criterion is the relation between tLOW and tHIGH (refer to Figure 13). It can be simplified to:

Low Bit (Logic 0): tLOW ≥ 2 x tHIGH

High Bit (Logic 1): tHIGH ≥ 2 x tLOW

The bit detection starts with a falling edge on the EN pin and ends with the next falling edge. Depending on the relation between tHIGH and tLOW, the logic 0 or 1 is detected.

The acknowledge condition is only applied if:

  • Acknowledge is requested by setting RFA bit to 1.
  • The transmitted device address matches with the device address of the IC.
  • Total 24 bits are received correctly.

If above conditions are met, after tvalACK delay from the moment when the last falling edge of the protocol is detected, an internal ACKN-MOSFET is turned on to pull the EN pin low for the time tACKN, which is 512 μs maximum, then the Acknowledge condition is valid. During the tvalACK delay, the master controller keeps the line low; after the delay, it should release the line by outputting high impedance and then detect the acknowledge condition. If it reads back a logic 0, it means the device has received the command correctly. The EN pin can be used again by the master when the acknowledge condition ends after tACKN time.

The acknowledge condition can only be requested when the master device has an open drain output. For a push-pull output stage, the use of a series resistor in the EN line to limit the current to 500 μA is recommended to for such cases as:

  • An accidentally requested acknowledge, or
  • To protect the internal ACKN-MOSFET.