JAJSSS6 January   2024 TPS7H3014-SP

ADVANCE INFORMATION  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Device Options
6. 5 Pin Configuration and Functions
7. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics
   6. 6.6 Timing Requirements
   7. 6.7 Quality Conformance Inspection
   8. 6.8 Typical Characteristics
8. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 Input Voltage (IN), VLDO and REFCAP
         1. 7.3.1.1 Undervoltage Lockout (VPOR_IN < VIN < UVLO)
         2. 7.3.1.2 Power-On Reset (VIN < VPOR_IN )
      2. 7.3.2 SENSEx Inputs
         1. 7.3.2.1 VTH_SENSEX and VONx
         2. 7.3.2.2 IHYS_SENSEx and VOFFx
         3. 7.3.2.3 Top and Bottom Resistive Divider Design Equations
      3. 7.3.3 Output Stages (ENx,SEQ_DONE,PWRGD,PULL_UP1 and PULL_UP2)
      4. 7.3.4 User-Programmable TIMERS
         1. 7.3.4.1 DLY_TMR
         2. 7.3.4.2 REG_TMR
      5. 7.3.5 UP and DOWN
      6. 7.3.6 FAULT
      7. 7.3.7 State Machine
   4. 7.4 Daisy Chain
9. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Self Contained – Sequence UP and DOWN
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
            1. 8.2.1.2.1 Input Power Supplies and Decoupling Capacitors
            2. 8.2.1.2.2 UP and DOWN Thresholds
            3. 8.2.1.2.3 SENSEx Thresholds
         3. 8.2.1.3 Application Curves
   3. 8.3 Power Supply Recommendations
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
       1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
11. 10Revision History
12. 11Mechanical, Packaging, and Orderable Information