To increase the reliability and feasability of the project adhere to the following guidelines on PCB layout with the UCC28750. These guidelines are general rules that can be followed for any power supply topology and are generally topology-agnostic. The main theme in power supply layouts is to keep the power loops and signal loops as small as possible to avoid coupling of strong signals from one to another and to lower losses caused by additional parasitics that arise from poor layout.

In a flyback topology, especially the primary which this guidelines are for, there are several loops to pay attention to and minimize:

• The primary power loop that delivers power to the output
• The snubber loop that absorbs the ringing due to leakage inductances
• The gate drive loop from the device to the gate of the switching device and back to the return
• The auxiliary power loop that rectifies the auxiliary voltage to a steady bias voltage for the UCC28750
• The feedback loop which carries low-current, sensitive information regarding regulation

The startup resistor path is not critical, as once startup is complete the path does not deliver significant power or information. The auxiliary winding takes over as the bias for the UCC28750 instead and is the higher priority power path for the device.

Figure 8-19 Simplified Primary Side Schematic Layout Guidelines