JAJSO02D September   2005  – November 2023 XTR117

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-A1BA2296-600A-4764-BBF1-62E55FF362E3/GUID-7F491310-4E37-4E2F-922E-35EFD7CCE84F
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Reverse-Voltage Protection
      2. 6.3.2 Overvoltage Surge Protection
      3. 6.3.3 VSON Package
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 External Transistor
      2. 7.1.2 Minimum Output Current
      3. 7.1.3 Offsetting the Input
      4. 7.1.4 Radio Frequency Interference
      5. 7.1.5 Maximum Output Current
      6. 7.1.6 Circuit Stability
    2. 7.2 Typical Application
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DGK|8
  • DRB|8
サーマルパッド・メカニカル・データ
発注情報

7.3.1 Layout Guidelines

The exposed leadframe die pad on the VSON packages can be soldered to a thermal pad on the PCB. A mechanical drawing showing an example layout is attached at the end of this data sheet. Refinements to this layout can be required based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heat-sink area on the PCB.

Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low power dissipation, solder the exposed pad to the PCB to provide structural integrity and long-term stability.