SBAU126E may   2007  – june 2023 ADS1158 , ADS1258

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1ADS1258EVM Overview
    1. 1.1 ADS1258EVM Kit
    2. 1.2 ADS1258EVM
  5. 2Getting Started With the ADS1258EVM
  6. 3Analog Interface
    1. 3.1 Analog Input Options
    2. 3.2 ADC Connections and Decoupling
    3. 3.3 Configurable Multiplexer Loop
      1. 3.3.1 Measuring Single-Ended Inputs Using a Pseudo-Differential Configuration
    4. 3.4 Clocking
    5. 3.5 Voltage Reference
  7. 4Digital Interface
    1. 4.1 GPIO
  8. 5Power Supplies
  9. 6Software Installation
  10. 7EVM Operation and GUI
    1. 7.1 Connecting the Hardware
    2. 7.2 EVM GUI Global Settings for ADC Control
    3. 7.3 Time-Domain Display
    4. 7.4 Frequency-Domain Display
    5. 7.5 Histogram Display
  11. 8Bill of Materials, Layout, and Schematics
    1. 8.1 Bill of Materials
    2. 8.2 EVM PCB Layout
    3. 8.3 Schematics
  12. 9Revision History

ADC Connections and Decoupling

Figure 3-2 shows all ADC connections. Each power-supply and reference connection have a 100-nF decoupling capacitor. Place these capacitors as close as possible to the ADC pins and make sure each component has a low-impedance connection to the GND plane.

Each digital pin of the ADC has a 49.9-Ω series resistor. These resistors smooth the edges of the digital signals so that the signals have minimal overshoot and ringing. A resistor is most important on the serial clock (SCLK) trace because the SCLK signal can toggle as quickly as 8 MHz. Resistors on the other pins are not strictly required, though these components can be included in the final design to improve digital signal integrity.

Pullup resistors R8, R9, R10, and R11 prevent CS, START, RESET, and PWDN, respectively, from floating when not driven. The differential voltage across test points TP4 and ground is the reference voltage used by the ADC.

GUID-20221026-SS0I-KR06-ZX50-8BK7NQ47C73L-low.svgFigure 3-2 ADS1258EVM ADC Power-Supply Decoupling and Analog and Digital Connections