SCEA143 December   2023 SN74AVC8T245 , SN74AVC8T245-Q1 , SN74AXC8T245 , SN74AXC8T245-Q1 , TXV0106 , TXV0106-Q1 , TXV0108 , TXV0108-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 TXV as an Upgradeable Pin-to-Pin Design
  5. 2Leveraging TXV for Power Isolation
  6. 3Bench Performance
    1. 3.1 Leveraging TXV for Low Propagation Delay (TPD) Applications
    2. 3.2 Leveraging TXV for Timing Performance
    3. 3.3 Leveraging TXV for Buffering
    4. 3.4 Leveraging TXV for High-Bandwidth Applications
  7. 4Summary
  8. 5References

2 Leveraging TXV for Power Isolation

Electrical noise and interference can negatively affect communication between MAC and PHY when either the MAC or the PHY are powered down, or when both the MAC and PHY do not ramp up simultaneously. TXV can be implemented as a form of isolation to combat signal distortions between hosts / peripherals.

The TXV device is fully specified for partial power-down applications using IOFF and power supply isolation sensitive applications. TXV's VCC isolation feature activates when either VCC supply is < 100 mV or at GND, placing all I/Os in high-impedance. Thereby, protecting the connected downstream devices from miscommunication or damages that might have occurred due to power sequencing limitations between the hosts or peripherals.

The IOFF circuitry disables the output, minimizes noise interference and any damaging back-flow current to downstream devices through TXV when either the host or the peripheral are powered down. Competitor typically specifies higher IOFF leakage current up to 30 µA while TXV is specified for approximately 8x lesser back-flow leakage current of 3.6 µA (max).

For more information, see Solving Power Sequencing Challenges for Ethernet RGMII Communications, application brief.