SCEA143 December   2023 SN74AVC8T245 , SN74AVC8T245-Q1 , SN74AXC8T245 , SN74AXC8T245-Q1 , TXV0106 , TXV0106-Q1 , TXV0108 , TXV0108-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 TXV as an Upgradeable Pin-to-Pin Design
  5. 2Leveraging TXV for Power Isolation
  6. 3Bench Performance
    1. 3.1 Leveraging TXV for Low Propagation Delay (TPD) Applications
    2. 3.2 Leveraging TXV for Timing Performance
    3. 3.3 Leveraging TXV for Buffering
    4. 3.4 Leveraging TXV for High-Bandwidth Applications
  7. 4Summary
  8. 5References

Leveraging TXV for High-Bandwidth Applications

Table 3-4 Bench - 3.3 V Vcco Bandwidth Performance
Parameter - 560MbpsTXV (V)Competitor (V)

Valid Levels (V)

{0.7*Vcco and 0.3*Vcco}

VOH2.61.8> 2.31
VOL0.0321.3< 0.99
  • Figure 3-9 shows typical bench data for TXV (1.8 V red inputs, 3.3 V green outputs) running at 560Mbps (280 MHz) with stable VOH (as high as 2.6 V) and stable VOL (as low as 32 mV).
  • Figure 3-10 shows how competitor can fail (1.8 V blue inputs, 3.3 V green outputs) with unstable VOH (as low as 1.9 V) and unstable VOL (as high as 1.3 V) for invalid logic switching levels.
GUID-20230925-SS0I-XFWZ-VVJS-D3XR4L81HXB5-low.jpgFigure 3-9 TXV Waveform (15 pF 1.8 V to 3.3 V Up Translation at 280 MHz, 25°C)
GUID-20230925-SS0I-WZ3D-T9DH-GTTJSGPDVDG5-low.jpgFigure 3-10 Competitor Waveform (15 pF 1.8 V to 3.3 V Up Translation at 280 MHz, 25°C)

For interfaces higher than 560Mbps (280 MHz), Figure 3-11 shows typical bench data with TXV (1.8 V red inputs, 3.6 V green outputs) running at 600Mbps (300 MHz) with VOH / VOL levels at 2.2 V and 0.3 V respectively, measuring low propagation delay (as fast as 1 ns), with 15 pF load.

GUID-20230925-SS0I-VD39-SLR2-X37XM1DNNT0H-low.jpgFigure 3-11 TXV Outputs (15 pF 1.8 V to 3.6 V Up Translation at 300 MHz, 25°C)

For typical applications such as 3.3 V, TI’s TXV0108 measured faster data throughput with stable outputs while competitor can fail with unstable outputs as shown in Table 3-5, with damages prevalent. Switching around 1/2 of the output's Vcc can lead to increased current draw with the likelihood of damaging the device if above the absolute maximum ratings. Refer to Implications of Slow or Floating CMOS Inputs, for additional information.