SLUA560D June   2011  – March 2022 UCC28950 , UCC28950-Q1 , UCC28951 , UCC28951-Q1

 

  1.   Trademarks
  2. 1 Design Specifications
  3. 2 Functional Schematic
  4. 3 Power Budget
  5. 4 Transformer Calculations (T1)
  6. 5 QA, QB, QC, QD FET Selection
  7. 6 Selecting LS
  8. 7 Output Inductor Selection (LOUT)
  9. 8 Output Capacitance (COUT)
  10. 9 Select FETs QE and QF
  11. 10Input Capacitance (CIN)
  12. 11Setting Up the Current Sense (CS) Network (CT, RS, RRE, DA)
  13. 12Voltage Loop and Slope Compensation
  14. 13Setting Turn-on Delays to Achieve Zero Voltage Switching (ZVS)
  15. 14Turning SR FETs-off Under Light Load Conditions
  16. 15600 W FSFB Detailed Schematic and Test Data
  17. 16References
  18. 17Revision History

7 Output Inductor Selection (LOUT)

To keep the RMS current in the output capacitance to a minimum LOUT will be designed for and inductor ripple current (∆ILOUT) will be 20% of the DC output current.

Equation 44. Δ I L O U T = P O U T × 0.2 V O U T = 600 W × 0.2 12 V ≈ 10   A
Equation 45. L O U T = V O U T × ( 1 - D T Y P ) Δ I L O U T × f s ≈ 2   u H

Calculate output inductor RMS current (ILOUT_RMS):

Equation 46. ILOUT_⁡RMS=IOUT2+ΔILOUT32=50.3 A

The LOUT inductor requirements to meet these design specifications was given to Vitec Electronics Corp and they design a custom inductor for this design that met are design requirements, part number 75PR108. The 75PR108 had a DC resistance (DCRLOUT) of 750 µΩ

Equation 47. D C R L O U T = 750   u Ω

Estimate output inductor losses (PLOUT) and recalculate power budget. Note PLOUT is an estimate of the inductor losses and was estimated to twice the copper loss. Note this may vary based on magnetic manufactures. It is advisable to double check the magnetic loss with the magnetic manufacture.

Equation 48. P L O U T = 2 × I L O U T _ ⁡ R M S 2 × D C R L O U T ≈ 3.8   W
Equation 49. PBUDGET=PBUDGET-PLOUT≈25.4 W