SLVUBB4B November   2017  – February 2023

 

  1.   Abstract
  2.   Trademarks
  3. 1 Topologies Window
  4. 2 FET Losses Calculator
  5. 3 Load Step Calculator
  6. 4 Capacitor Current Sharing Calculator
  7. 5 AC/DC Bulk Capacitor Calculator
  8. 6 RCD-Snubber Calculator for Flyback Converters
  9. 7 RC-Snubber Calculator
  10. 8 Output Voltage Resistor Divider
  11. 9 Dynamic Analog Output Voltage Scaling
  12. 10Dynamic Digital Output Voltage Scaling
  13. 11Unit Converter
  14. 12Loop Calculator
    1. 12.1 Inputs
    2. 12.2 Transfer Functions
      1. 12.2.1  Output Impedance Transfer Function
      2. 12.2.2  Transfer Function VMC Buck Power Stage
      3. 12.2.3  Transfer Function CMC Buck Power Stage
      4. 12.2.4  Transfer Function CMC Boost Power Stage
      5. 12.2.5  Transfer Function CMC Inverting Buck-Boost Power Stage
      6. 12.2.6  Transfer Function CMC Forward Power Stage
      7. 12.2.7  Transfer Function CMC Flyback Power Stage
      8. 12.2.8  Transfer Function Closed Loop
        1. 12.2.8.1 Transfer Function Type II Compensation Network
        2. 12.2.8.2 Transfer Function Type II Transconductance Compensation Network
        3. 12.2.8.3 Transfer Function Type III Compensation Network
      9. 12.2.9  Transfer Function Isolated Type II Compensation Network With a Zener Clamp
      10. 12.2.10 Transfer Function Isolated Type II Compensation Network Without a Zener Clamp
  15. 13Filter Designer
    1. 13.1 Impedances
    2. 13.2 Transfer Functions
    3. 13.3 Filter Output Impedance
    4. 13.4 Damping Factor
  16. 14Additional Information
  17. 15Revision History

12.1 Inputs

#GUID-163394AE-B42D-41C7-ABEE-0EC78936D3FF/T5147377-45 lists general information.

Table 12-1 General Information
Vin Input voltage
Vout Output voltage
Iout Load current
L Inductance / Flyback primary inductance
DCRL Inductor DC resistance
Cout,1 Capacitance output capacitor 1
For ceramic capacitors use the capacitance at the DC bias voltage.
ESRout,1 Equivalent series resistance output capacitor 1
Cout,2 Capacitance output capacitor 2
For ceramic capacitors use the capacitance at the DC bias voltage.
ESRout,2 Equivalent series resistance output capacitor 2
fswitch Switching frequency
Np ⁄ Ns Transformer turns ratio
Opto BW Optocoupler bandwidth

#GUID-163394AE-B42D-41C7-ABEE-0EC78936D3FF/T5147377-46 lists gain information.

Table 12-2 Gain Information
Vramp PWM ramp voltage
Gm Error amplifier transconductance
As Current-sense amplifier gain
Rs Current-sense resistance
AOL Error amplifier open-loop gain
GBWP Error amplifier gain bandwidth product
Rp ⁄ RD Optocoupler transfer ratio
CTR Current Transfer Ratio
Vslope Slope compensation voltage
SLM Slope compensation multiplier

Current-sense gain As and current-sense resistance Rs:

For converters with integrated current-sensing circuits, sometimes there are no specific values for As and Rs in the data sheet. Instead, a value for Gm,ps (can also appear as “COMP to switch current transconductance”) is typically displayed. Equation 28 shows the relationship between these values.

Equation 28. G m , p s = 1 A s × R s

In this case, values for As and Rs must be chosen to have the stated Gm,ps as a result. (For example, use the RDS(on) of the internal FET for Rs and calculate As from Equation 28.)

The input field for Vslope offers the user the option to use either Vslope or a slope compensation multiplier (SLM), in case the value for Vslope cannot be calculated by the designer (for example, because of internal slope compensation). Switching between these two variables can be done by right-clicking on the Vslope/SLM input field.

Vslope:

  • Calculate the value for Vslope with the equations from the data sheet. If the device has internal slope compensation, a value for Vslope is typically given in the Electrical Characteristics section.

SLM:

  • SLM is a variable to simulate the slope compensation under certain circumstances. How it affects calculations can be found in the subsections for each topology.
  • Ideal slope compensation will be calculated with a value of 1.
  • Values greater than 1 show how the converter will drift to VMC with increasing values of SLM, as the information of the original current signal will be lost at a certain point. A Type III compensation network would then be necessary to compensate the converter.
  • Values in the range from 0 to 1 simulate conditions when not enough slope compensation is present, and a resonance will become visible at half the switching frequency caused by the quality factor of the double pole of the inductance.

#GUID-163394AE-B42D-41C7-ABEE-0EC78936D3FF/T5147377-53 lists component values.

Table 12-3 Component Values
RFBT Top feedback resistance
RFBB Bottom feedback resistance
RFF Compensation feed-forward resistance
RCOMP Compensation resistance
CFF Compensation feed-forward capacitance
CCOMP Compensation capacitance
CHF Compensation high-frequency capacitance

For Type II and Type II transconductance compensation networks, the Loop Calculator offers an option to use an additional Feed-Forward Capacitor in parallel with RFBT. This option can be enabled by right-clicking on the CFF input field and choosing Use.

At start-up the Loop Calculator displays only the resulting Bode plot for the Total Gain and Total Phase. The graphs for the Gain of the Power Stage, Phase of the Power Stage, Gain of the Error Amplifier, Phase of the Error Amplifier and the Error Amplifier Open Loop Gain can be switched on by selecting the respective checkbox.