SLVUCQ4 july   2023 TPS631012

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Background
    2. 2.2 Setup
    3. 2.3 Input and Output Connectors, Test Points, and Headers Description
      1. 2.3.1 J1, Pin 1 and 2 – VIN
      2. 2.3.2 J1, Pin 3 and 4 – S+/S-
      3. 2.3.3 J1, Pin 5 and 6 – GND
      4. 2.3.4 J2, Pin 1 and 2 – VOUT
      5. 2.3.5 J2, Pin 3 and 4 – S+/S-
      6. 2.3.6 J2, Pin 5 and 6 – GND
      7. 2.3.7 Test Points
        1. 2.3.7.1 J4, J5
        2. 2.3.7.2 TP1, TP2
      8. 2.3.8 Header Information
        1. 2.3.8.1 J6– I2C
      9. 2.3.9 Jumper Information
        1. 2.3.9.1 JP1 – ENABLE
    4. 2.4 Setup
    5. 2.5 Modifications
      1. 2.5.1 IC U1 Operation
  7. 3Software
    1. 3.1 Software Setup
    2. 3.2 Interface Hardware Setup
    3. 3.3 User Interface Operation
      1. 3.3.1 Home Screen
      2. 3.3.2 Settings Screen
      3. 3.3.3 Register Map Screen
    4. 3.4 Register Map
      1. 3.4.1 Register CONTROL1 (Target Address: 0x2A; Register Address: 0x02; Default: 0x08)
      2. 3.4.2 Register VOUT (Target Address: 0x2A; Register Address: 0x03; Default: 0x5C)
      3. 3.4.3 Register CONTROL2 (Target Address: 0x2A; Register Address: 0x05; Default:0x45)
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1. 5.1 Trademarks

3.4.3 Register CONTROL2 (Target Address: 0x2A; Register Address: 0x05; Default:0x45)

Table 4-4 shows the CONTROL2 register.

Return to Section 3.4.

This register identifies the die revision of the device.

Table 3-4 Register CONTROL2 Field Descriptions
Bit Field Type Reset Description
7 FPWM R/W 0b0

Force PWM operation

0 : DISABLE, 1 : ENABLE
6 FAST_RAMP_EN R/W 0b1

Device can start-up faster then VOUT ramp

0 : DISABLE, 1 : ENABLE
5:4 EN_DISCH_VOUT[1:0] R/W 0b00

Enable of BUBO Vout Discharge

00 : DISABLE

01 : SLOW (34mA)

10 : MEDIUM (67mA)

11 : FAST (100mA)
3 CL_RAMP_MIN R/W 0b0

Define the minimum current limit during the soft start ramp

0 : Low (500mA)

1 : High (2x Low)
2:0 TD_RAMP[2:0] R/W 0b101

Defines the ramp time for the Vo soft start ramp

000: 0.256ms

001: 0.512ms

010: 1.024ms

011: 1.920ms

100: 3.584ms

101: 7.552ms

110: 9.600ms

111: 24.320ms