SNLA113C november   2008  – june 2023 DS91M124 , DS91M125 , SN65LVDM050 , SN65LVDM050-Q1 , SN65LVDM051 , SN65LVDM051-Q1 , SN65LVDM1676 , SN65LVDM1677 , SN65LVDM176 , SN65LVDM179 , SN65LVDM180 , SN65LVDM22 , SN65LVDM31 , SN65MLVD040 , SN65MLVD047A , SN65MLVD048 , SN65MLVD080 , SN65MLVD082 , SN65MLVD128 , SN65MLVD129 , SN65MLVD2 , SN65MLVD200A , SN65MLVD202A , SN65MLVD204A , SN65MLVD204B , SN65MLVD206B , SN65MLVD3

 

  1.   1
  2.   AN-1926 An Introduction to M-LVDS and Clock and Data Distribution Applications
  3.   Trademarks
  4. 1 Introduction
  5. 2 M-LVDS Standard Overview
  6. 3 Driver Characteristics
  7. 4 Receiver Characteristics
  8. 5 M-LVDS Portfolio
  9. 6 M-LVDS Applications
  10. 7 Clock Distribution in AdvancedTCA Systems
  11. 8 Clock Distribution in MicroTCA Systems
  12. 9 M-LVDS as a Short Reach RS-485 Alternative
  13. 10Signal Distribution with Point-to-Point Links
  14. 11Wired-OR Implementation
  15. 12Design Guidelines
  16. 13Conclusion
  17. 14References
  18. 15Revision History

10 Signal Distribution with Point-to-Point Links

Among many other benefits, signal distribution with multipoint networks reduces connector size and cable diameter, lowers conductor count and PCB thickness, and ultimately decreases system cost. These benefits come at the cost of signal integrity, maximum transmission reach and speed. When satisfactory signal integrity, transmission reach or speed using multipoint networks cannot be achieved, signal distribution with point-to-point links may be the only option. Signal distribution with point-to-point links is accomplished using fan-out buffers as illustrated in Figure 10-1.

GUID-C3CEE871-8E66-4189-A710-3E3A131E42B2-low.gifFigure 10-1 Signal Distribution with Point-to-Point Links

The current M-LVDS portfolio offers two 1:4 fan-out buffers/signal repeaters: DS91M124 and DS91M125.

The DS91M124 is the fan-out buffer with an LVCMOS input and four M-LVDS outputs. It provides LVCMOS-to-M-LVDS level translation and 1:4 signal distribution. It is best suited for taking an LVCMOS signal from a local signal source and distributing it to local or remote M-LVDS receivers.

The DS91M125 is the fan-out buffer with an LVDS input and four M-LVDS outputs. It can take an LVDS compatible signal from a local or remote source via a point-to-point or multidrop link and distribute it to four local or remote M-LVDS receivers or M-LVDS multipoint networks.

In addition to M-LVDS fan-out buffer, there are also several LVDS and Bus LVDS fan-out buffers. Table 10-1 provides the summary.

Table 10-1 Summary of the TI’s Fan-out Buffers
Part NumberDescriptionPackageFeatures
DS91M124125 MHz 1:4 M-LVDS Repeater with LVCMOS InputSOIC-16Low skew, per channel output enable
DS91M125125 MHz 1:4 M-LVDS Repeater with LVDS InputSOIC-16LVDS input, per channel output enable
DS92CK16125 MHz Bus LVDS 1:6 Clock Buffer/Bus TransceiverTSSOP-241:6 LVCMOS Outputs, Bus LVDS I/O
DS90LV110T1:10 LVDS Clock / Data DistributorTSSOP-28200 MHz / 400 Mbps Operation, Low Skew
DS90LV110AT1:10 LVDS Clock / Data Distributor with FailsafeTSSOP-28Failsafe Operation
DS10BR2541.5 Gbps 2:4 LVDS RepeaterLLP-40LOS, 8 kV ESD
DS25BR2043.125 Gpbs 2:4 LVDS Repeater, with Transmit Pre-emphasis and Receive EqualizationLLP-40Input Equalization, Output Pre-emphasis, LOS