SNVA037F April   2001  – February 2022 LM3477 , LM3488

 

  1.   Trademarks
  2. 1Introduction
  3. 2Performance
  4. 3Hysteretic Mode
  5. 4Increasing Current Limit
  6. 5Layout Fundamentals
  7. 6Revision History

Performance

Figure 2-1 to Figure 2-2 show some benchmark data taken from the circuit above on the LM3477 evaluation board. This evaluation board can also be used to evaluate a buck regulator circuit optimized for a different operating point or to evaluate a trade-off between cost and some performance parameter. For example, the conversion efficiency can be increased by using a lower RDS(ON) MOSFET, ripple voltage can be lowered with lower ESR output capacitors, and the hysteretic threshold can be changed as a function of the RSN and RSL resistors.

The conversion efficiency can be increased by using a lower RDS(ON) MOSFET, however, it drops as input voltage increases. The efficiency reduces because of increased diode conduction time and increased switching losses. Switching losses are due to the Vds × Id transition losses and to the gate charge losses, both of which can be lowered by using a FET with low gate capacitance. At low duty cycles, where most of the power loss in the FET is from the switching losses, trading off higher RDS(ON) for lower gate capacitance will increase efficiency.

GUID-7D1765CF-AED2-4315-BB79-E0A5B5870EF8-low.png Figure 2-1 Efficiency vs Load VOUT = 3.3 V
GUID-F9B7750B-9968-44B1-AE9D-4F75F7E133B6-low.png Figure 2-2 Efficiency vs VIN VOUT = 3.3 V, IOUT = 2 A

Figure 3-1 shows a bode plot of LM3477 open loop frequency response using the external components listed in Table 1-1.

GUID-3BE28082-9748-4F85-B73F-28769DBF5A81-low.png
Magnitude = 20 dB/Decade, Bandwidth = 39.8 kHz, Phase = 45°/Decade, Phase Margin = 41°
Figure 2-3 Open Loop Frequency Response VIN = 5 V, VOUT = 3.3 V, IOUT = 1.5 A