SPRAC76G November   2022  – February 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5726 , AM5728 , AM5729 , AM5746 , AM5748 , AM5749 , AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442 , AM6526 , AM6528 , AM6546 , AM6548

 

  1.   1
  2.   Sitara Processor Power Distribution Networks: Implementation and Analysis
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Acronyms Used in This Document
  5. 2Guidelines for PCB Stack-Up
  6. 3Physical Layout Optimization of the PDN
  7. 4Static PDN Analysis (IR Drop Optimization)
  8. 5Dynamic Analysis of PCB PDN
    1. 5.1 Selecting Decoupling Capacitors to Meet ZTARGET
  9. 6Checklist for PDN
  10. 7Implementation Examples and PDN Targets
    1. 7.1 AM570x
    2. 7.2 AM571x
    3. 7.3 AM572x
    4. 7.4 AM574x
    5. 7.5 AM65xx/DRA80xM
    6. 7.6 AM62xx
    7. 7.7 AM64xx
    8. 7.8 AM62Ax
  11.   Revision History

1 Introduction

This application report provides implementation guidelines and recommendations for designing printed circuit board (PCB) power delivery networks (PDN) for the Texas Instruments Sitara family of microprocessors. This application report will:

  • Discuss PCB PDN design methodology
  • Provide general PCB PDN design recommendations and requirements
  • Discuss the rationale behind these design requirements
  • Provide suggestions and methods that PCB designers can implement to ensure that the PDN requirements for a specific processor are met.
  • Provide PDN targets for Sitara-class microprocessors