SLVUCH7A september 2022 – june 2023 TPS25990
Table 4-1 lists the TPS25990EVM eFuse Evaluation Board input and output connectors functionality. Table 4-2 and Table 4-3 describe the availability of test points and the functionality of the jumpers. Table 4-4 summarizes the way to configure the device address. Table 4-5 presents the function of the signal LED.
Connector | Label | Description |
---|---|---|
T1 | VIN (+) | Positive terminal for the input power to the EVM |
T2 | VOUT (+) | Positive terminal for the output power from the EVM |
T3 | PGND (–) | Negative terminal for the EVM (common for both input and output) |
Test Points | Label | Description |
---|---|---|
TP1 | S1_P | Kelvin sensing points to measure
|
TP2 | S1_N | |
TP3 | VIN | Input Voltage |
TP4 | VOUT | Output Voltage |
TP5 | MODE2 | MODE selection: Secondary Device |
TP6 | FLTb2 | Open-drain active low fault indication: Secondary Device |
TP7 | VDD | Controller input power |
TP8 | FLTb | Open-drain active low fault indication: Primary Device |
TP9 | SWEN | Open-drain signal to indicate and control power switch ON and OFF status |
TP10 | TEMP | Maximum device die temperature monitor analog voltage output with TPS25990 and TPS25985 in parallel |
TP11 | CMPM2 | General purpose comparator negative input: Secondary Device |
TP12 | AUX | Auxiliary ADC input channel used to monitor external analog signal through PMBus Also functions as analog input for fast comparator with internal programmable threshold |
TP13 | CMPP2 | General purpose comparator positive input: Secondary Device |
TP14 | CMPOUT2 | General purpose comparator open-drain output: Secondary Device |
TP15 | DVDT | Start-up output slew rate control |
TP16 | DAC1 | Programmable DAC analog buffered current output |
TP17 | IMON | Load current monitor and overcurrent threshold and fast-trip threshold during steady-state |
TP18 | ILIM2 | Current limit and fast-trip threshold during start-up: Secondary Device |
TP19 | ILIM | Current limit and fast-trip threshold during start-up: Primary Device |
TP20 | IREF | Reference voltage for overcurrent & short-circuit protections, and active current sharing blocks |
TP21 | PG | Open-drain active high power good indication |
TP22 | EN | Active high enable input |
TP23 | ADDR0 | PMBus Address Configuration Pin |
TP24 | ADDR1 | PMBus Address Configuration Pin |
TP25 | SMBA | SMBus™ alert output |
TP26 | SDA | PMBus data line |
TP27 | SCL | PMBus clock line |
TP28 | +3P3V Pullup | 3.3 V pullup power supply generated using a LDO from VIN |
TP29 | +5V Pullup | 5 V pullup power supply generated using a LDO from VIN |
TP30 | GD EXTERNAL | External gate signal for custom load transient |
TP31 | PGND | Supply ground |
QGND1 | QGND | Device ground |
G1 | QGND | Device ground |
G2 | QGND | Device ground |
Jumper | Label | Description | Default Jumper Position |
---|---|---|---|
J2 | SWEN | 1-2 Position: The SWEN pullup supply is generated from VIN using a Zener diode | 1-2 |
3-4 Position: The SWEN pullup supply is generated from VIN using a LDO | |||
J3 | DVDT | 1-2 Position sets the output slew rate to 1.8 V/ms | 5-6 |
3-4 Position sets the output slew rate to 12 V/ms | |||
5-6 Position sets the output slew rate to 1.2 V/ms | |||
J4 | ILIM | 1-2 Position sets the inrush current limit to 25 A and the active current sharing threshold to 40 A with VIREF of 1 V: Primary Device | 1-2 |
3-4 Position sets the inrush current limit to 19 A and the active current sharing threshold to 30 A with VIREF of 1 V: Primary Device | |||
J5 | ILIM2 | 1-2 Position sets the inrush current limit to 32 A and the active current sharing threshold to 50 A with VIREF of 1 V: Secondary Device | 1-2 |
3-4 Position sets the inrush current limit to 38 A and the active current sharing threshold to 60 A with VIREF of 1 V: Secondary Device | |||
J6 | IMON | 1-2 Position sets the circuit breaker threshold to 70-A with VIREF of 1-V: Both primary and secondary devices are connected in parallel | 1-2 |
3-4 Position sets the circuit breaker threshold to 110-A with VIREF of 1-V: Both primary and secondary devices are connected in parallel | |||
J9 | EXTERNAL GATE SIGNAL | 1-2 Position provides the GATE signal to the MOSFETs (Q4 – Q6) from the on-board mono-shot timer | 1-2 |
2-3 Position provides the GATE signal to the MOSFETs (Q4 – Q6) from the external signal generator |
J7 (ADDR0) | J8 (ADDR1) | Address | Default Address Set in the EVM |
---|---|---|---|
OPEN | OPEN | 0x40 | 0x46 |
GND (1-2 Position) | 0x41 | ||
75 kΩ to GND (3-4 Position) | 0x42 | ||
150 kΩ to GND (5-6 Position) | 0x43 | ||
267 kΩ to GND (7-8 Position) | 0x44 | ||
GND (1-2 Position) | OPEN | 0x45 | |
GND (1-2 Position) | 0x46 | ||
75 kΩ to GND (3-4 Position) | 0x47 | ||
150 kΩ to GND (5-6 Position) | 0x48 | ||
267 kΩ to GND (7-8 Position) | 0x49 | ||
75 kΩ to GND (3-4 Position) | OPEN | 0x4A | |
GND (1-2 Position) | 0x4B | ||
75 kΩ to GND (3-4 Position) | 0x4C | ||
150 kΩ to GND (5-6 Position) | 0x4D | ||
267 kΩ to GND (7-8 Position) | 0x4E | ||
150 kΩ to GND (5-6 Position) | OPEN | 0x50 | |
GND (1-2 Position) | 0x51 | ||
75 kΩ to GND (3-4 Position) | 0x52 | ||
150 kΩ to GND (5-6 Position) | 0x53 | ||
267 kΩ to GND (7-8 Position) | 0x54 | ||
267 kΩ to GND (7-8 Position) | OPEN | 0x55 | |
GND (1-2 Position) | 0x56 | ||
75 kΩ to GND (3-4 Position) | 0x57 | ||
150 kΩ to GND (5-6 Position) | 0x58 | ||
267 kΩ to GND (7-8 Position) | 0x59 |
LED | Description |
---|---|
DG1 | When ON, indicates that PG is asserted |
DR1 | When ON, indicates that FLTb is asserted |
DR2 | When ON, indicates that FLTb2 is asserted |