SLVUCO6 june   2023 TPSI2072-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4.   General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  5. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
  6. 2Connection Descriptions
  7. 3Test Equipment
  8. 4Recommended Test Setup
    1. 4.1 Waveforms
    2. 4.2 VS1_ADC and VS2_ADC Voltage Dividers
  9. 5Schematic
  10. 6PCB Layout
  11. 7Interlayer Stitching Capacitor
    1. 7.1 Interlayer Stiching Capacitors & EMI Performance Improvements
    2. 7.2 VS1_ADC and VS2_ADC Voltage Dividers
  12. 8Bill of Materials
  13. 9Revision History

1.3 Description

The TPSI2072Q1EVM is a six-copper layer board containing multiple test points and jumpers in order to fully evaluate the functionality of the device. The primary side consists of four differential drivers which deliver power and enable logic information to each of the internal MOSFETs on the secondary side. Each MOSFET on the secondary side has a dedicated full-bridge rectifier to form its local power supply. When the enable pin is brought HI, the oscillator starts and the drivers send power and a logic HI across the barrier. The avalanche robust MOSFETs and the thermal benefits of the widened pins on the 11 DWQ package enable the TPSI2072-Q1 to survive dielectric withstand testing (HiPot) and DC fast charger surge currents of up to 2 mA without requiring any external protection components.

GUID-983E8444-F8FD-4D15-AF12-489398463DE7-low.svgFigure 1-1 TPSI2072-Q1 Functional Block Diagram (need to update)
Table 1-1 Device Information
PART NUMBERPACKAGEBODY SIZE (NOM)
TPSI2072-Q1SOIC 11 pin (DWQ)10.3 mm × 7.5 mm