SNLA431 January   2024 DP83TC812R-Q1 , DP83TC812S-Q1

 

  1.   1
  2.   Trademarks
  3. 1Preface
  4.   Notational Conventions
  5. 2Related Documentation
  6. 3Support Resources
  7. 4Troubleshooting the PHY Application
    1. 4.1  Schematic and Layout Checklist
    2. 4.2  Verify Successful Power-up of PHY
    3. 4.3  Peripheral Pin Checks
      1. 4.3.1 Probe the RESET_N pin
      2. 4.3.2 Probe the INH pin
      3. 4.3.3 Probe the CLKOUT pin
      4. 4.3.4 Probe the Serial Management Interface (MDC, MDIO) Pins
    4. 4.4  Register Dump Comparison
    5. 4.5  Verifying Strap Configurations
    6. 4.6  Check the MDI Signal
    7. 4.7  Link Up Failed Common Issues
    8. 4.8  Signal Quality Check
    9. 4.9  Power Up Timing
    10. 4.10 Loopback Testing
    11. 4.11 Debugging the MAC Interface
    12. 4.12 Verify Open Alliance PMA Compliance
    13. 4.13 Tools and References
      1. 4.13.1 DP83TC812 Register Access
      2. 4.13.2 DP83TC812 USB2MDIO Scripts
      3. 4.13.3 Extended Register Access
      4. 4.13.4 Software and Driver Debug on Linux
        1. 4.13.4.1 Commonly Seen Linux Terminal Outputs
  8. 5Conclusion

4.5 Verifying Strap Configurations

Incorrect strap configurations are one of the most common issues leading to lack of data throughput. For example, if the incorrect MAC interface mode is chosen or the PHY is placed in managed mode when autonomous mode is intended to be used, data transmission and reception is not successful.

The strap values sampled at power up can be read from register 0x45D (CHIP_SOR_1) using Extended Register Access. Use the strap tool in the DP83TC812 Schematic Checklist to verify the intended straps configuration has been loaded in register 0x45D.

Verify that the MAC is not driving any pins connected to the PHY upon power up or reset pin de-assertion. This causes an incorrect voltage to be sampled and cause the strap value to be different than intended. All MAC pins connected to the PHY must be placed in a High-Z state while the PHY is powering up or coming out of reset.